Writable array logic

Details Writable array logic Writable array logic

1987-01-05

1988-03-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, 307467, 307463, 364716, 365189, H03K 19177

Patent

active

047301309

ABSTRACT:
A bipolar writable array logic device is provided having an output representing a logical AND function and a logical OR function in response to a plurality of input signals. An AND matrix decode and an OR matrix decode are coupled to an input circuit for separately decoding a plurality of input signals. An array of collector sensed memory cells is coupled to the AND matrix decode for selecting desired rows of the collector sensed memory cells. A first plurality of sense amplifiers are coupled between the OR matrix decode and columns of the collector sensed memory cells for providing an ANDed output. Rows of an array of emitter sensed memory cells are coupled to the first plurality of sense amplifiers. A second plurality of sense amplifiers are coupled to columns of the emitter sensed memory cells for providing the bipolar writable array logic device output.

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