Workpiece carrier with adjustable pressure zones and barriers

Abrading – Machine – Rotary tool

Reexamination Certificate

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Details

C451S287000, C451S388000, C451S398000, C451S402000

Reexamination Certificate

active

06746318

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed generally to the planarizing of silicon wafers and other workpieces with an improved wafer carrier having adjustable pressure zones and adjustable pressure barriers.
2. Description of Related Art
A flat disk or “wafer” of single crystal silicon is the basic substrate material in the semiconductor industry for the manufacture of integrated circuits. Semiconductor wafers are typically created by growing an elongated cylinder or boule of single crystal silicon and then slicing individual wafers from the cylinder. The slicing causes both faces of the wafer to be extremely rough. In addition, applicant has noticed other semiconductor wafer processing steps, e.g., shallow trench isolation (STI) and copper deposition, produce predictable concentric bulges of excess material on the wafer. For example, applicant has noticed that conventional STI processes usually produce a wide peripheral ring-shaped bulge and a small central disk-shaped bulge with a narrow trough between bulges. Applicant has also noticed that conventional copper deposition processes, usually produce a narrow peripheral ring-shaped bulge and a small central disk-shaped bulge with a wide trough between bulges.
The front face of the wafer on which integrated circuitry is to be constructed must be extremely flat in order to facilitate reliable semiconductor junctions with subsequent layers of material applied to the wafer. Also, the material layers (deposited thin film layers usually made of metals for conductors or oxides for insulators) applied to the wafer while building interconnects for the integrated circuitry must also be made a uniform thickness. Planarization is the process of removing projections and other imperfections to create a flat planar surface, both locally and globally, and/or the removal of material to create a uniform thickness for a deposited thin film layer on a wafer. Semiconductor wafers are planarized or polished to achieve a smooth, flat finish before performing process steps that create integrated circuitry or interconnects on the wafer. To this end, machines have been developed to provide controlled planarization of both structured and unstructured wafers.
A conventional method of planarizing a wafer will now be discussed. The wafer is secured in a carrier that is connected to a shaft in a CMP tool. The shaft transports the carrier, and thus the wafer, to and from a load or unload station and a position adjacent a polishing pad mounted to a platen. A pressure is exerted on the back surface of the wafer by the carrier in order to press the wafer against the polishing pad, usually in the presence of slurry. The wafer and/or polishing pad may be rotated, orbited, linearly oscillated or moved in a variety of geometric or random patterns via motors connected to the shaft and/or platen.
Numerous carrier designs are known in the art for holding and distributing a pressure on the back surface of the wafer during the planarization process. Conventional carriers commonly have a hard flat pressure plate that is used to press against the back surface of the wafer that does not conform to the back surface of the wafer. As a consequence, the pressure plate is not capable of applying a uniform polish pressure across the entire area of the wafer, especially at the edge of the wafer. In an attempt to overcome this problem, the pressure plate is often covered be a soft carrier film. The purpose of the film is to transmit uniform pressure to the back surface of the wafer to aid in uniform polishing. In addition to compensating for surface irregularities between the carrier plate and the back surface of the wafer, the film deforms around and smooths over minor contamination on the wafer surface. Such contamination could produce high pressure points in the absence of such a carrier film. Unfortunately, the films are only partially effective with limited flexibility and no capability for globally adjusting once they have been applied to the pressure plate.
A common problem for conventional carriers having a hard, flat plate, is that they cannot compensate for incoming wafers that have one or more bulges. The hard flat plate is limited by the fact that it cannot adjust the pressure applied to different zones on the back surface of the wafer. It is common for some wafer processing steps to leave bulges on the wafer. Conventional carriers typically remove approximately the same amount of material across the entire front face of the wafer, thereby leaving the bulges on the wafer. Only sufficiently smooth, flat portions of the wafer surface may be effectively used for circuit deposition. Thus, the depressions limit the useful area of the semiconductor wafer.
Other conventional carriers implement means for applying more than one pressure region across the back surface of the wafer. Specifically, some conventional carriers provide a carrier housing with a plurality of concentric internal chambers that may be independently pressurized separated by barriers. By pressurizing the individual chambers in the top plate to different magnitudes, a different pressure distribution can be established across the back surface of the wafer.
However, Applicants have discovered that the pressure distribution across the back surface of the wafer for conventional carriers is not sufficiently controllable. This is due to the lack of control of the pressure caused by the barriers on the back surface of the wafer. The barriers are important in controlling the pressure on the back surface of the wafer between internal chambers. Therefore, the ability to control the applied pressure across the entire back surface of the wafer is limited, thereby restricting the ability to compensate for anticipated removal problems.
What is needed is a system for controlling the application of multiple pressure zones and the pressure from the barriers between zones across the entire back surface of a wafer during planarization.
SUMMARY OF THE INVENTION
Thus, it is an object of the present invention to provide an apparatus and method for controlling the pressure distribution on the back surface of a wafer through independently controllable concentric zones and barriers while planarizing the wafer.
In one embodiment of the present invention, a carrier is disclosed for planarizing a surface of a wafer. The carrier includes a central disk-shaped plenum, a plurality of concentric ring-shaped plenums surrounding the central plenum and a plurality of concentric barriers between neighboring plenums. The pressure distribution on the back surface of the wafer may thus be controlled by adjusting the pressure in the plenums and the pressure exerted on the barriers.
In another embodiment, a carrier is disclosed that includes a carrier housing that advantageously comprises a rigid non-corrosive material. The carrier housing is preferably cylindrically shaped with a first major surface being used to couple the carrier to a CMP tool and a second major surface with a plurality of concentric ring-shaped plenums.
An elastic web diaphragm is placed over the second major surface thereby covering the carrier plenums. A plurality of elastic ring-shaped ribs extend orthogonally from the web diaphragm opposite the ring-shaped carrier plenums. The web diaphragm and ribs may be made from a single mold, but are preferably separate pieces. The plurality of ring-shaped ribs extending from the web diaphragm thereby defines a central disk-shaped web plenum surrounded by one or more concentric ring-shaped web plenums. The web diaphragm and ribs may be held in place by clamping rings that are tightened against the carrier housing thereby trapping the web diaphragm and ribs placed between the clamping rings and carrier housing.
The carrier plenums may be pressurized by corresponding carrier fluid communication paths in fluid communication with each of the carrier plenums. The carrier plenums are used to control an urging force on the ribs to assist the ribs in sealing against the wafer or to assist in the di

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