Wordline wakeup circuit for use in a pulsed wordline design

Details Wordline wakeup circuit for use in a pulsed wordline design Wordline wakeup circuit for use in a pulsed wordline design

1996-11-13

1998-09-22

Hoang, Huan

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365233, 365194, G11C 800

Patent

active

058124829

ABSTRACT:
A wordline wakeup circuit for use in a static memory responsive to an external clock signal and chip enable signals provided by a controller/microprocessor to perform a memory operation on the static memory. The wordline wakeup circuit receives a global clock (GCLK) signal generated by memory control circuitry from the external clock signal and a word line enable (WLEN) signal asserted by the control circuitry when the chip enables indicate a pending memory operation. The wordline wakeup circuit asserts a wordline wakeup signal (LWLEN) signal as soon as possible after the GCLK signal goes high. The LWLEN signal when asserted activates decoder circuity to assert wordlines as necessary to perform the memory operation. If the WLEN signal is provided, the wordline wakeup circuit keeps the LWLEN signal high for at least the high portion of the GCLK signal, enabling the decoder to execute the memory operation, if the WLEN signal is not provided, the wordline wakeup circuit drops the LWLEN signal. The short pulse made by the LWLEN signal when there is no pending memory operation does not affect the decoder.

REFERENCES:
patent: 5598375 (1997-01-01), Yang et al.
patent: 5598376 (1997-01-01), Merritt et al.
patent: 5602795 (1997-02-01), Sandhu
patent: 5636165 (1997-06-01), Amatangelo et al.

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