Wordline booster circuit and method of operating a wordline...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S189090, C365S185230

Reexamination Certificate

active

07636254

ABSTRACT:
The invention relates to a wordline booster circuit, especially an SRAM-wordline booster circuit, comprising a driving element (20) for shifting a voltage level of a charge storage element (50) for storing a charge necessary to generate a boosted voltage (Vb), a feedback element (30) for controlling the switching state of a charging element (40), wherein the charging element (40) is actively switchable between a turned-off state during a first time interval and a turned-on state during a second time interval, and an output port (14) for supplying the boost voltage to at least one wordline-driver circuit (100) of a memory device (200). The invention relates also to an operation method for such a wordline booster circuit as well as a memory array implementation on an integrated circuit, especially an SRAM memory array, with a wordline booster circuit.

REFERENCES:
patent: 4239993 (1980-12-01), McAlexander et al.
patent: 4280010 (1981-07-01), Erpenbach et al.
patent: 4692638 (1987-09-01), Stiegler
patent: 4814647 (1989-03-01), Tran
patent: 6603688 (2003-08-01), Hasegawa et al.
patent: 7031421 (2006-04-01), Marx et al.

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