Word line driving circuit for dynamic RAM

Details Word line driving circuit for dynamic RAM Word line driving circuit for dynamic RAM

1992-10-20

1994-11-08

Popek, Joseph A.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518911, G11C 1300, G11C 700

Patent

active

053633385

ABSTRACT:
A word line driving circuit for a DRAM comprises, a number of CMOS type word line driving stages, a voltage level shifter and a negative transferrer connected between the voltage level shifter and a common gate electrode node of the CMOS type word line driving stages, for applying a voltage signal varying from a driving voltage to a negative voltage below ground potential to the common gate electrode node.

REFERENCES:
patent: 4437171 (1984-03-01), Hudson et al.
patent: 4678941 (1987-07-01), Chao et al.
patent: 4787066 (1988-11-01), Leuschner
patent: 4845381 (1989-07-01), Cuevas
patent: 5202823 (1993-04-01), Shimogawa
patent: 5214602 (1993-05-01), Lines

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