Word line driver in a semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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36523008, G11C 800

Patent

active

056027966

ABSTRACT:
A word line driver has a decoder for outputting decode signals having first and second logic levels, level shifters for receiving the respective decode signals, each level shifter outputting drive signal having first and third logic levels in response to the received decode signal, the third logic level being higher than the second logic level; a pumping circuit for outputting word line activation signals, at least one of the word line activation signals having the third logic level; and groups of output circuits, each group having the output circuits connected to one of the level shifters and a word line, respectively, each of the output circuits outputting the word line activation signal to the respective word line in response to the decode signal and the drive signal.

REFERENCES:
patent: 5282171 (1994-01-01), Tokami
patent: 5351217 (1994-09-01), Jean
patent: 5394374 (1995-02-01), Ishimura
"Cross-Coupled Level-Shifting Low-Voltage Wordline Driver For Dram," IBM Technical Disclosure Bulletin, vol. 34, No. 4B, Sep. 1991, Armonk, NY, pp. 332-334.

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