Word line driver for semiconductor memories

Details Word line driver for semiconductor memories Word line driver for semiconductor memories

1997-02-06

1999-02-23

Zarabian, A.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365 72, 365 63, G11C 800

Patent

active

058751491

ABSTRACT:
A hierarchical word line driving structure is disclosed that uses a single global word line and low power sub-word line driver circuits that are relatively small in size. Higher density memory cell arrays are made possible by inverting the signal on a global word line inside each sub-word line driver circuit.

REFERENCES:
patent: 4747082 (1988-05-01), Minato et al.
patent: 4782465 (1988-11-01), Uchida
patent: 4914630 (1990-04-01), Fujishima et al.
patent: 4967396 (1990-10-01), Kajigaya et al.
patent: 5005068 (1991-04-01), Ikeda et al.
patent: 5083294 (1992-01-01), Okajima
patent: 5122857 (1992-06-01), Ikeda et al.
patent: 5132928 (1992-07-01), Hayashikoshi et al.
patent: 5172335 (1992-12-01), Sasaki et al.
patent: 5193074 (1993-03-01), Anami
patent: 5239196 (1993-08-01), Ikeda et al.
patent: 5268587 (1993-12-01), Murata et al.
M. Horenstein, "Microelectronic Circuits and Devices," .COPYRGT.1990 Prentice-Hall, Inc., TK 7874, #675, pp. 729-747, 758.

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