Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2006-11-14
2008-11-04
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189060, C365S189090, C365S189110, C365S206000
Reexamination Certificate
active
07447104
ABSTRACT:
A word line driver is provided for accessing a DRAM cell embedded in a conventional logic process. The DRAM cell includes a p-channel access transistor coupled to a cell capacitor. The word line driver includes an n-channel transistor located in a p-well, wherein the p-well is located in a deep n-well. The deep n-well is located in a p-type substrate. A word line couples the drain of the n-channel transistor to the gate of the p-channel access transistor. A negative boosted voltage supply applies a negative boosted voltage to the p-well and the source of the n-channel transistor. The negative boosted voltage is less than ground by an amount equal to or greater than the threshold voltage of the p-channel access transistor. The deep n-well and the p-type substrate are coupled to ground. The various polarities can be reversed in another embodiment.
REFERENCES:
patent: 4330852 (1982-05-01), Redwine et al.
patent: 4446536 (1984-05-01), Rodgers
patent: 4549284 (1985-10-01), Ikuzaki
patent: 4625301 (1986-11-01), Berger
patent: 4758993 (1988-07-01), Takemae
patent: 4839867 (1989-06-01), Poehnitzsch
patent: 4999814 (1991-03-01), Hashimoto
patent: 5033027 (1991-07-01), Amin
patent: 5193072 (1993-03-01), Frenkil et al.
patent: 5295109 (1994-03-01), Nawaki
patent: 5365479 (1994-11-01), Hoang et al.
patent: 5450364 (1995-09-01), Stephens, Jr. et al.
patent: 5471601 (1995-11-01), Gonzales
patent: 5511033 (1996-04-01), Jung
patent: 5544120 (1996-08-01), Kuwagata et al.
patent: 5559750 (1996-09-01), Dosaka et al.
patent: 5583823 (1996-12-01), Park
patent: 5586287 (1996-12-01), Okumura et al.
patent: 5642320 (1997-06-01), Jang
patent: 5652729 (1997-07-01), Iwata et al.
patent: 5659515 (1997-08-01), Matsuo et al.
patent: 5719814 (1998-02-01), Ishikawa
patent: 5721862 (1998-02-01), Sartore et al.
patent: 5748547 (1998-05-01), Shau
patent: 5784705 (1998-07-01), Leung
patent: 5802555 (1998-09-01), Shigeeda
patent: 5822252 (1998-10-01), Lee et al.
patent: 5822265 (1998-10-01), Zdenek
patent: 5829026 (1998-10-01), Leung et al.
patent: 5835401 (1998-11-01), Green et al.
patent: 5846860 (1998-12-01), Shih et al.
patent: 5859809 (1999-01-01), Kim
patent: 5873114 (1999-02-01), Rahman et al.
patent: 5875452 (1999-02-01), Katayama et al.
patent: 5920225 (1999-07-01), Choi et al.
patent: 5940851 (1999-08-01), Leung
patent: 5963477 (1999-10-01), Hung
patent: 5999474 (1999-12-01), Leung et al.
patent: 6028804 (2000-02-01), Leung
patent: 6031779 (2000-02-01), Takahashi et al.
patent: 6043536 (2000-03-01), Numata et al.
patent: 6075740 (2000-06-01), Leung
patent: 6088267 (2000-07-01), Atsumi et al.
patent: 6147914 (2000-11-01), Leung et al.
patent: 6166987 (2000-12-01), Atsumi et al.
patent: 6187618 (2001-02-01), Kao et al.
patent: 6195303 (2001-02-01), Zheng
patent: 6222785 (2001-04-01), Leung
patent: 6259651 (2001-07-01), Leung
patent: 6282606 (2001-08-01), Holland
patent: 6366989 (2002-04-01), Keskar et al.
patent: 6452852 (2002-09-01), Bohm
patent: 6455901 (2002-09-01), Kameyama et al.
patent: 6473344 (2002-10-01), Kim et al.
patent: 6493268 (2002-12-01), Khouri et al.
patent: 6496034 (2002-12-01), Forbes et al.
patent: 6496437 (2002-12-01), Leung
patent: 6504780 (2003-01-01), Leung
patent: 6549465 (2003-04-01), Hirano et al.
patent: 6600186 (2003-07-01), Lee et al.
patent: 6661699 (2003-12-01), Walker
patent: 6718431 (2004-04-01), Barth et al.
patent: 6865114 (2005-03-01), Pio
patent: 6930927 (2005-08-01), Pascucci
patent: 6940759 (2005-09-01), Tsang et al.
patent: RE38944 (2006-01-01), Takahashi et al.
patent: 7020024 (2006-03-01), Sim
patent: 2001/0014045 (2001-08-01), Kitamoto et al.
patent: 2001/0053093 (2001-12-01), Ogura et al.
patent: 2002/0017947 (2002-02-01), Ooishi et al.
patent: 2002/0041531 (2002-04-01), Tanaka et al.
patent: 2002/0097628 (2002-07-01), Fujisawa et al.
patent: 2002/0122344 (2002-09-01), Takemura et al.
patent: 2003/0001181 (2003-01-01), Leung et al.
patent: 2003/0002353 (2003-01-01), Lee
patent: 2003/0058722 (2003-03-01), Park
patent: 2003/0081484 (2003-05-01), Kobayashi et al.
patent: 2003/0151072 (2003-08-01), Leung et al.
patent: 2003/0185085 (2003-10-01), Kaneko
patent: 2003/0189859 (2003-10-01), Takahashi et al.
patent: 2003/0223261 (2003-12-01), Kato et al.
patent: 2005/0068838 (2005-03-01), Kono et al.
patent: 2005/0117411 (2005-06-01), Koshikawa et al.
patent: 2005/0174873 (2005-08-01), Ferrant et al.
patent: 2005/0280061 (2005-12-01), Lee
patent: 2006/0007612 (2006-01-01), Lusky et al.
patent: 2006/0112321 (2006-05-01), Leung
patent: 2006/0172504 (2006-08-01), Sinitsky et al.
patent: 2006/0273848 (2006-12-01), Yamazaki et al.
patent: 0 811 979 (1991-09-01), None
patent: 0 588 250 (1994-03-01), None
patent: 0 794 497 (1997-09-01), None
patent: 0 942 430 (1999-09-01), None
patent: 2 265 035 (1993-09-01), None
patent: 58048293 (1983-03-01), None
patent: 03289232 (1991-12-01), None
patent: 98-19309 (1998-05-01), None
patent: WO 00/19445 (2000-04-01), None
Enhanced Memory Systems, Inc. “16Mbit Enhanced SDRAM Family 4Mx4, 2Mx8, 1Mx16,” 1997, pp. 1-8.
IBM Corp. “A 16Mbit Synchronous DRAM,” Revised May 1996, p. 1-100.
Johns, David A. & Ken Martin,Analog Integrated Circuit Design, John Wiley & Sons, Inc., 1997, Chap. 5, pp. 248-250.
Rambus Inc., Direct Rambus Technology Disclosure, 1997, pp. 1-48.
Ramtron International Corp. “DM2202/2212 EDRAM 1 Mbx4 Enhanced . . . ,” pp. 2-17 to 2-33.
NEC Electronics, Inc. “Dynamic CMOS RAM,” pp. 6-101 to 6-113.
Infineon Technologies, “HYB/E 25L128160AC, 128-Mbit Mobile-RAM,” Dec. 2001.
MoSys, Inc. “MD904 to MD920 . . . ,” 1996, DS01-2.4, Feb. 21. 1997.
Infineon Technologies, “Mobile RAM,” Application Note, V1.1, Feb. 2002, pp. 1-7.
Intel Corp. “Pentium Processor 3.3V Pipelined BSRAM Specification,” Ver. 2.0, May 25, 1995.
SLDRAM Consortium, “400 Mb/s/pin SLDRAM,” pp. 1-59.
Toshiba MOS Digital Integrated Circuit, Sep. 2, 1996.
Bever Hoffman & Harms LLP
Hoffman E. Eric
MoSys, Inc.
Pham Ly D
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