Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1994-10-20
1995-10-24
Popek, Joseph A.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
36523008, 36518911, 326108, G11C 1140
Patent
active
054615933
ABSTRACT:
A word-line driver of a semiconductor memory device having an address buffer for receiving a row address and a word-line decoder for converting an output signal of the address buffer into a word-line decoding signal is disclosed. The word-line driver includes: a first pull-up transistor for transferring a first row selecting signal to a first node connected to a first word line, responding to the word-line decoding signal; a first pull-down transistor connected between the first node and a ground voltage terminal for pulling down a voltage level of the first node, responding to a complementary signal of the first row selecting signal; a second pull-up transistor for transferring a second row selecting signal to a second node connected to a second word line, responding to the word-line decoding signal; a second pull-down transistor connected between the second node and a ground voltage terminal for pulling down a voltage level of the second node, responding to a complementary signal of the second row selecting signal; and a switching transistor connected between the first and second nodes which is controlled by the word-line decoding signal.
REFERENCES:
patent: 4514829 (1985-04-01), Chao
patent: 4788457 (1988-11-01), Mashiko et al.
patent: 4953133 (1990-08-01), Kashimura
Goldstar Electron Co. Ltd.
Hoang Huan
Popek Joseph A.
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