Word line driver circuit for semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

36523003, G11C 800

Patent

active

058620982

ABSTRACT:
A word line driver for a semiconductor memory device includes a row decoder for generating a block select signal and driving a main word line in accordance with an address signal, a sub word line enable unit for generating a main decoding signal in accordance with the address signal, a word decoder driver for buffering the main decoding signal and transmitting the main decoding signal to a memory cell block, a block word decoder driver for enabling a sub decoding signal in the memory cell block in accordance with the block select signal and the main decoding signal, and a sub word line driver for driving a sub word line in accordance with the sub decoding signal and the main word line driven by the row decoder.

REFERENCES:
patent: 4542486 (1985-09-01), Anami et al.
patent: 5416748 (1995-05-01), Fujita

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