Word line driver circuit

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

326 17, 326 88, G11C 800, H03K 19017

Patent

active

055441122

ABSTRACT:
A word line driver circuit operable for receiving address signals from a decoder circuit and for gating these address signals to be outputted as a word line signal to one or more memory cells within a RAM. The driver circuit prevents oscillations of the outputted word line signal by not allowing any internal nodes between circuit elements to have a floating potential. This function is provided by a plurality of circuit elements arranged in a unique manner so that the internal nodes are not allowed to float.

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patent: 5426603 (1995-06-01), Nakamura et al.
patent: 5467032 (1995-11-01), Lee

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