Word line and source line driver circuitries

Static information storage and retrieval – Floating gate – Particular biasing

Patent

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Details

36518505, 36523006, G11C 1606, G11C 800

Patent

active

060976365

ABSTRACT:
A word line and source line decoder driver circuit has at least one word line, at least one source line, a row decoder driver circuit displaced at a first side of a memory array and a high voltage circuit displaced at an opposite side of the memory array. The word line is connected to the row decoder driver and extends substantially from the row decoder driver circuit in the direction of the high voltage circuit. The source line is connected to the high voltage circuit and extends substantially from the high voltage circuit in the direction of the row decoder driver circuit, but is not connected thereto. Alternatively, a word line decoder driver circuit has a row decoder driver circuit displaced at a first side of a memory array, a high voltage circuit displaced at a second side, opposite said first side, of the memory array. At least one word line is connected to the row decoder driver circuit and the high voltage circuit. At least one source line is connected to the high voltage circuit and extends in the direction of the row decoder driver circuit, but is not connected thereto. A blocking transistor, in each word line, is configured to prevent a high voltage from reaching said row decoder driver circuit.

REFERENCES:
patent: 4617652 (1986-10-01), Simko
patent: 5544117 (1996-08-01), Nakayama et al.
patent: 5910913 (1999-06-01), Kato et al.

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