Patent
1986-03-24
1988-09-13
James, Andrew J.
357 45, H01L 2352, H01L 2940
Patent
active
047713291
ABSTRACT:
In a semiconductor integrated circuit having a double-layered wiring construction, wirings between adjacent logic function blocks of the circuit are provided using first level wirings of the double-layered wiring construction, and wirings among logic function blocks or between two logic function blocks having at least one intervening logic function block are provided by second level wirings of the double-layered wiring construction.
REFERENCES:
patent: 3312871 (1967-04-01), Seki et al.
James Andrew J.
Lamont John
NEC Corporation
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