Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1999-05-26
2001-03-13
Gaffin, Jeffrey (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C174S050510, C174S260000, C174S261000, C174S263000, C257S712000, C257S724000, C257S737000, C257S738000, C257S774000, C257S760000, C257S778000, C257S783000, C361S760000, C361S767000, C361S771000, C361S783000, C361S761000
Reexamination Certificate
active
06201707
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a wiring substrate used for a resin-sealing type semiconductor device and a resin-sealing type semiconductor device structure using such a wiring substrate.
BACKGROUND OF THE INVENTION
In recent years, along with the development of portable apparatuses, etc., miniaturization and light weight of these apparatuses have been achieved remarkably. In response to these trends, there have been ever-increasing demands for semiconductor devices which are assembled into a small package of a BGA (Ball Grid Array) type called CSP (Chip Size Package or Chip Scale Package).
This package of the BGA type has a structure in which ball-shaped external terminals that are arranged on the under surface of the package in the form of an area array are joined to a packaging substrate when a semiconductor is installed on the packaging substrate. With respect to the packaging method for the above-mentioned package, a batch reflow process, etc. is generally carried out together with other electronic parts.
With respect to the structure of a resin-sealing type semiconductor device of the BGA type called CSP, a structure of CSP, which has been currently mass-produced, is disclosed in Japanese Laid-Open Patent Application 121002/1997 (Tokukaihei 9-121002) (Published on May 6, 1997). In this semiconductor device, a semiconductor chip is packaged on an insulating wiring substrate.
In this insulating wiring substrate, a wiring pattern is formed on the chip packaging surface, and on this wiring pattern on the chip packaging surface is provided an insulating material for ensuring insulation from the semiconductor chip with an inner joining area that allows electric connection to the semiconductor chip being maintained thereon.
Moreover, on the surface opposite to the chip packaging surface, a through hole used for connecting the external connecting terminal is provided so as to install the external terminal that is connected to the above-mentioned wiring pattern. With respect to the wiring pattern at this portion, a land section larger than the through hole is formed so as to cover the through hole.
The semiconductor chip is provided with an electrode on its surface, and the rear surface thereof is joined to the chip packaging surface. The semiconductor chip is connected to the wiring on the insulating wiring substrate by wire, and the semiconductor chip and the wire are sealed by resin on the insulating wiring substrate. Moreover, a terminal used for external connection is provided inside the through hole.
The resin-sealing type semiconductor device of the BGA type adopts a structure in which: the semiconductor chip is packaged on the insulating wiring substrate, and after an electrical conduction has been ensured between the wiring pattern and the semiconductor chip, these are sealed with resin. Then, the ball-shaped terminal, which is an external terminal, is attached thereto. In most cases, this ballshaped terminal is made of solder, and is subjected to a heating treatment in a reflow furnace or the like, so as to form the terminal.
Moreover, such a resin-sealing type semiconductor device is often packaged simultaneously with other packaging parts when the semiconductor chip is packaged on the insulating wiring substrate by the user; therefore, at this time, this is also subjected to a heating treatment by a reflow furnace or the like. For this reason, bubbles and moisture, located in the interface between the insulating wiring substrate and the semiconductor chip, expand due to heat, thereby causing separation, swelling, etc. of the resin.
As described above, defects tend to occur in the resin-sealing type semiconductor device of BGA type due to swelling caused by heat at the time of assembling and packaging.
In order to solve the above-mentioned problems, Japanese Laid-Open Utility Model Application No. 51449/1988 (Jitsukaishou 63-51449) (Published on Apr. 7, 1988) has proposed an arrangement, although this relates to a type different from the CSP structure of the BGA type. In this arrangement, as illustrated in FIGS.
8
(
a
) and
8
(
b
), a through hole
102
is provided in a chip packaging section
101
of a packaging substrate
100
so that the generation of bubbles at the joining section between the chip and the packaging substrate
100
is prevented.
Therefore, as illustrated in FIGS.
9
(
a
) and
9
(
b
), when the arrangement of Japanese Laid-Open Utility Model Application No. 51449/1988 is applied to the CSP structure of the BGA type, a through hole
25
for drawing air with a smaller diameter is provided on the insulating substrate
26
at a position without a wiring pattern
22
.
However, in the above-mentioned method, since the through hole
25
for drawing air is provided in the insulating substrate
26
, the through hole
25
tends to intersect the wiring pattern
22
. Here, from the viewpoint of reliability of the semiconductor device, it is not desirable to have an intersection between the through hole
25
and the wiring pattern
22
. In order to avoid the intersection between the through hole
25
and the wiring pattern
22
, as illustrate in
FIG. 8
, a portion having no wiring pattern needs to be provided on the periphery of the through hole
25
of the insulating substrate
26
. This portion also needs to be provided with a large area to a certain extent by taking into consideration the pattern positional precision and the machining precision of the position of the through hole
25
for drawing air. For this reason, the application of the above-mentioned arrangement further limits the degree of freedom in designing the wiring pattern
22
.
Moreover, although it is desirable to form the through holes
25
for drawing air in a uniform manner over the packaging portion of the semiconductor chip, the abovementioned arrangement sometimes makes it impossible to make such a formation due to difficulties encountered in designing the wiring pattern
22
. Moreover, it is necessary to provide a more difficult machining process so as to form the through holes
25
for drawing air with such a small diameter; this results in an increase in the manufacturing cost of the insulating substrate
26
.
SUMMARY OF THE INVENTION
The present invention has been devised to solve the above-mentioned problems, and its objective is to provide a wiring substrate used for a resin-sealing type semiconductor device which can easily provide holes for eliminating adverse effects due to bubbles and moisture located in the interface between a wiring substrate used for a resin-sealing type semiconductor device and a semiconductor chip to be packaged thereon, at positions covering a wider area on the above-mentioned substrate without sacrifice of degree of freedom in designing the wiring pattern, and a resin-sealing type semiconductor device structure using such a wiring substrate.
In order to achieve the above-mentioned objective, the wiring substrate used for a resin-sealing type semiconductor device of the present invention is provided with an insulating substrate in which a through hole used for connecting an external terminal is formed, a wiring pattern formed on a semiconductor-chip packaging surface side of the insulating substrate, a land section that is formed at an end of the wiring pattern in a manner so as to cover the through hole from the semiconductor-chip packaging surface side, and that is used for connecting the external connecting terminal to the wiring pattern from the surface side opposite to the above-mentioned semiconductor-chip packaging surface side of the insulating substrate, and a through-hole opening section that allows the through hole to be partially open on the semiconductor-chip packaging surface side.
With this arrangement, when a wiring substrate used for a resin-sealing type semiconductor device is applied, a semiconductor chip is packaged on the semiconductor-chip packaging surface side thereof, and this packaging surface side is sealed by resin. Moreover, an external connecting terminal is inserted in the through hole for connect
Gaffin Jeffrey
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
Tran Thanh Y.
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