Wiring substrate, multi-layered wiring substrate and method...

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S261000, C361S792000, C361S793000

Reexamination Certificate

active

06492597

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a wiring substrate to be used in electronic devices, a multi-layered wiring substrate formed by layering films such as a build-up wiring substrate, and method of fabricating such a wiring substrate and a multi-layered wiring substrate.
2. Description of the Related Art
There has been used a wiring substrate for an assembly of an electronic device, which substrate was fabricated generally by adhering an electrically conductive layer such as a copper foil to a hard substrate composed, for instance, of glass epoxy, and patterning the electrically conductive layer into a circuit pattern. Recently, a flexible wiring substrate comprised of a resin film has been used in place of the above-mentioned wiring substrate. Hereinbelow are explained two examples of such a flexible wiring substrate.
FIG. 1
is a cross-sectional view of a conventional wiring substrate
100
as a first example. The wiring substrate
100
is disclosed in Japanese Unexamined Patent Publication No. 10-224014.
The wiring substrate
100
is comprised of an insulating layer
31
composed of polyimide resin, a first wiring layer
34
adhered to an upper surface of the insulating layer
31
through an adhesive
32
, and a second wiring layer
35
adhered to a lower surface of the insulating layer
31
through an adhesive
33
.
The first and second wiring layers
34
and
35
have desired patterns and are comprised of a copper foil.
The insulating layer
31
and the first and second wiring layers
34
and
35
are formed with a through-hole
36
. The through-hole
36
is covered along an inner surface thereof with an electrically conductive layer
37
which electrically connects the first and second wiring layers
34
and
35
to each other.
A through-hole
39
an outer surface of which is defined by the electrically conductive layer
37
is filled with an electrically conductive or non-conductive material
38
.
The electrically conductive layer
37
, the electrically conductive or non-conductive material
38
, and the first wiring layer
34
are covered with a resist film
40
without a part of the first wiring layer
34
.
A first electrically conductive layer
41
is formed on the first wiring layer
34
in a region not covered with the resist film
40
. A second electrically conductive layer
42
is formed on the second wiring layer
35
.
FIG. 2
is a cross-sectional view of a conventional wiring substrate
200
as a second example. The wiring substrate
200
is disclosed in Japanese Unexamined Patent Publication No. 9-64231.
The wiring substrate
200
is comprised of an insulating layer
51
composed of polyimide resin, a first wiring layer
54
adhered to an upper surface of the insulating layer
51
through an adhesive
52
, and a second wiring layer
55
adhered to a lower surface of the insulating layer
51
through an adhesive
53
.
The first and second wiring layers
54
and
55
have desired patterns and are comprised of a copper foil.
The insulating layer
51
and the first wiring layer
54
are formed with a via-hole
56
reaching the second wiring layer
55
. The via-hole
56
is covered along an inner surface thereof with an electrically conductive layer
57
which covers further with the second wiring layer
55
and hence electrically connects the first and second wiring layers
54
and
55
to each other.
A recess
59
an outer surface of which is defined by the electrically conductive layer
57
is filled with an electrically conductive or non-conductive material
58
.
The electrically conductive layer
57
, the electrically conductive or non-conductive material
58
, and the first wiring layer
54
are covered with a resist film
60
without a part of the first wiring layer
54
.
A first electrically conductive layer
61
is formed on the first wiring layer
54
in a region not covered with the resist film
60
. A second electrically conductive layer
62
is formed on the second wiring layer
55
.
As mentioned above, the conventional wiring substrates
100
and
200
are designed to have the first and second wiring layers
34
,
35
and
54
,
55
adhered to the insulating layers
31
and
51
through the adhesives
32
,
33
and
52
,
53
. Namely, the conventional wiring substrates
100
and
200
have to include a substrate coated with a copper foil, resulting in an increase in fabrication cost.
In addition, since the electrically conductive layers
37
and
57
are laid on the first and second wiring layers
34
,
35
and
54
,
55
, there are generated a step or steps formed on the first and second wiring layers
34
,
35
and
54
. This results in a problem that it becomes quite difficult to fabricate the wiring substrate thinner.
Furthermore, the through- or via-hole
36
or
56
is necessary to be formed smaller as a pitch between through- or via-holes becomes smaller. However, it would be more difficult to fill the through- or via-hole
36
or
56
with a filler in the conventional wiring substrates
100
and
200
, if the through- or via-hole
36
or
56
were formed smaller.
Japanese Unexamined Patent Publication No. 10-125722 has suggested a two-layered wiring substrate comprised of an insulating substrate composed of an insulating material, a first copper wiring layer formed on an upper surface of the insulating substrate, a second copper wiring layer formed on a lower surface of the insulating substrate, the insulating substrate being formed with a blind via-hole extending between the first and second wiring layers throughout the insulating substrate, and a copper plating layer formed on an inner surface of the blind via-hole to electrically connect the first and second copper wiring layers to each other.
However, the above-mentioned problems remain unsolved even in the above-mentioned Publication.
SUMMARY OF THE INVENTION
In view of the above-mentioned problems in the conventional wiring substrates, it is an object of the present invention to provide a wiring substrate which makes it no longer necessary to adhere copper foils to an insulating layer, eliminates a step or steps which was (were) formed on wiring layers, and removes difficulty in filling a through- or via-hole with a filler.
It is also an object of the present invention to provide a multi-layered wiring substrate which does the same.
It is further an object of the present invention to provide a method of fabricating the above-mentioned wiring substrate and multi-layered wiring substrate.
In one aspect of the present invention, there is provided a wiring substrate including (a) an insulating layer formed with at least one tapered through-hole, (b) a first wiring layer covering an upper surface of the insulating layer therewith, (c) a second wiring layer covering a lower surface of the insulating layer therewith, and (d) an electrically conductive layer covering an inner surface of the tapered through-hole and closing the tapered through-hole at a bottom of the tapered through-hole.
It is preferable that the electrically conductive layer is integral with the first wiring layer.
It is preferable that the electrically conductive layer is integral with the second wiring layer.
It is preferable that a relation between a diameter &phgr; of the tapered through-hole at a bottom thereof and a thickness T of the electrically conductive layer is defined as follows:
&phgr;≦2T
For instance, the diameter &phgr; may be in the range of 10 to 40 micrometers both inclusive.
For instance, the thickness T may be in the range of 5 to 30 micrometers both inclusive.
For instance, the tapered through-hole may have a taper angle in the range of 15 to 65 degrees both inclusive relative to an axis of the tapered through-hole.
It is preferable that the first and second wiring layers and the electrically conductive layer are composed of copper or copper alloy, and are formed in contact with the insulating layer without applying an adhesive therebetween.
It is preferable that the first and second wiring layers and the electrically conductive layer are comprised of an elec

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