Wiring substrate having position information

Details Wiring substrate having position information Wiring substrate having position information

2005-03-01

2005-03-01

Eckert, George (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

C257S685000, C257S686000, C257S723000, C257S777000, C361S760000, C361S783000, C361S784000, C361S803000, C361S749000, C438S113000, C438S462000, C439S493000, C349S149000, C349S150000, C349S151000, C349S152000

Reexamination Certificate

active

06861764

ABSTRACT:
A wiring board for a semiconductor package comprises a base substrate having first and second surfaces; a wiring layer consisting of necessary wiring patterns formed on at least one of the first and second surfaces; a plurality of semiconductor element mounting areas formed on the surface of the base substrate on which the wiring layer is formed; and individual patterns as position information provided for the respective semiconductor element mounting areas, the individual patterns having a particular shape for the respective semiconductor element mounting area. The individual patterns as position information are formed on peripheral regions of the respective semiconductor element mounting areas.

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