Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2008-12-17
2011-11-29
Chervinsky, Boris (Department: 2835)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S260000, C174S262000, C174S263000, C257S783000
Reexamination Certificate
active
08067698
ABSTRACT:
On a printed-wiring board1-1, a conductor layer2is laminated to both the top surface and the bottom surface of a substrate core7so as to pattern the substrate core, and a solder resist4is laminated to the substrate core. The solder resist4laminated to the top surface of the printed-wiring board1-1forms a raised portion40in a semiconductor chip mounting area such that the thickness of the raised portion is greater than the thickness of the solder resist4laminated to areas other than the semiconductor chip mounting area, so that the surface of the semiconductor chip mounting area is flat.
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Japanese Office Action issued in Japanese Patent Application No. JP 2008-031900 dated Aug. 31, 2011.
Suzuki Hiroaki
Tanaka Hiroyuki
Chervinsky Boris
McDermott Will & Emery LLP
Panasonic Corporation
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