Wiring substrate and semiconductor device and method of...

Details Wiring substrate and semiconductor device and method of... Wiring substrate and semiconductor device and method of...

2011-02-22

2011-02-22

Lee, Hsien-ming (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S730000, C257S734000, C257S778000, C257SE23141, C438S052000, C438S108000, C438S117000

Reexamination Certificate

active

07893524

ABSTRACT:
In a wiring substrate of a semiconductor device, a hollow portion is provided under a pad wiring portion including a connection pad, and thus a wiring layer has a cantilever structure in which the pad wiring portion is formed as an aerial wiring, and a semiconductor chip is flip-chip connected to the connection pad. The pad wiring portion including the connection pad is formed on a sacrifice layer which is filled in a recess portion in an interlayer insulating layer of the wiring substrate, then the semiconductor chip is flip-chip connected to the connection pad, and then the hollow portion is provided by removing the sacrifice layer.

REFERENCES:
patent: 6809412 (2004-10-01), Tourino et al.
patent: 2004/0094815 (2004-05-01), Park et al.
patent: 2008/0011508 (2008-01-01), Sunohara et al.
patent: 2000-22317 (2000-01-01), None

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