Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1997-11-14
2001-05-01
Paladini, Albert W. (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C174S261000, C257S766000, C257S781000, C228S180220
Reexamination Certificate
active
06225569
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wiring substrate, and particularly to a wiring substrate having a plurality of electrode pads to which electrical components such as semiconductor integrated circuit chips are connected through soldering.
2. Description of the Related Art
A method for bonding semiconductor integrated circuit chips (so called flip-chip bonding) involves connecting a semiconductor integrated circuit chip (hereinafter referred to as an “IC chip” or simply as a “chip”) to a wiring substrate by directly bonding electrode pads (input/output terminals) arranged on the entire surface of one main face of the IC chip to corresponding electrode pads on the wiring substrate through face-down soldering. Flip-chip bonding is widely employed in wiring substrates of the ball grid array (BGA), pin grid array (PGA), and land grid array (LGA) types, because it facilitates bonding of chips in high densities.
In a ceramic wiring substrate formed from, for example, alumina ceramic, electrode pads (hereinafter referred to as pads) are formed thereon in the following manner. Through use of metallization paste comprising mainly high-melting-point metal powders, such as tungsten and molybdenum powders, patterns (circles, rectangles, and the like) of electrode pads are printed in a predetermined array on a laminated alumina green sheet, followed by co-firing. Thus, metal layers, serving as pads for connection to elements and a printed circuit board (a mother board), are formed on the surface of the ceramic substrate. Thereafter, the metal layers are plated with nickel-boron (Ni-B) by, for example, electroless plating. The thus-plated metal layers are further plated with gold (Au) to prevent oxidation.
As shown in
FIGS. 7 and 8
, in such a flip-chip bonding type assembly, an IC chip
31
is placed on a wiring substrate
1
such that electrode pads
32
of the IC chip
31
are aligned with corresponding electrode pads
11
of the wiring substrate
1
. Thereafter, solder bumps
33
having a relatively high melting point and having been formed previously on the pads
32
or
11
are caused to reflow through application of heat, to thereby establish the electrical connection between the pads
11
and
32
.
Recently, however, it has been pointed out that pores or voids V are frequently formed, for unknown cause, in solder bumps formed on the pads
11
of the wiring substrate
1
, or, as shown in
FIG. 8
, in the solder
33
connecting the pads
11
and
32
in a semiconductor device wherein the IC chip
31
is flip-chip bonded to the wiring substrate
1
. This results in a problem with the reliability of the electrical connection.
The presence of such voids V can be determined, as shown in
FIG. 9
, by applying a vertical tensile force P to separate the IC chip
31
from the wiring substrate
1
sufficient to break the solder
33
connecting the pads
11
and
32
. The broken surface of the solder
33
is then observed. When the voids V are not present, the solder
33
subjected to the tensile force P elongates and breaks forming sharp points upon breakage as shown in FIG.
10
. By contrast, when the voids V are present, the solder
33
breaks before sharp points are formed and fine craters K are observed in the broken surface, proving the presence of the voids V. Conventionally, 150 to 350 craters of this kind have been observed for 1,000 pads.
As mentioned above, the metal layer constituting the pad
11
of the wiring substrate
1
is plated with nickel. Conventionally, from the viewpoint of corrosion resistance, the necessary and sufficient thickness of this plating is said to be approximately 1 &mgr;m. If the plating is excessively thick, the metal layer becomes highly likely to separate from the substrate surface due to internal stress generated after plating. Further, in view of production efficiency represented by plating manhours (or plating time), cost, or like factors, an appropriate plating thickness was normally 1.5 &mgr;m or below. Accordingly, the standard plating thickness was in the range of from 1 &mgr;m to 1.5 &mgr;m.
The present inventors thought that if the thickness of the nickel plating layer of the pad
11
of the wiring substrate
1
is in the range of 1 &mgr;m to 1.5 &mgr;m, which has been conventionally considered as an appropriate, the base metal layer would not be covered completely, so that the metal layer would be partially exposed and residual plating solution trapped in any exposed portions may cause the generation of a void. The inventors checked the surface of the pad
11
after nickel plating and observed that components of the base metallization layer
4
, namely tungsten (W), molybdenum (Mo), fine ceramic grains, as of Al
2
O
3
, and glass frit, were slightly exposed through the nickel plating layer
5
to form pinholes, as shown in FIG.
12
.
In order to prevent such an exposure of the metal layer
4
, the present inventors repeatedly conducted the above tensile test on wiring substrate samples having different thicknesses of nickel plating layer
5
and to which IC chips were flip-chip bonded. The examination of broken surfaces of solder of,the tensile tested samples revealed that the thickness of the nickel plating layer
5
in a certain range provided a significantly reduced rate of generation of voids.
SUMMARY OF THE INVENTION
The present invention has been achieved based on the above finding, and an object of the present invention is to provide a wiring substrate formed from a ceramic member in which a metal layer constituting electrode pads is formed from a high melting-point metal, whose main components are tungsten, molybdenum, and manganese, and is plated with nickel in an appropriate plating thickness to thereby reduce the generation of voids in the bonding solder thereby improving the reliability of the electrical connection.
To achieve the above object, the present invention provides a wiring substrate which is formed from a ceramic member having electrode pads to which an electrical component like an IC chip is connected through soldering and in which a metal layer constituting each of the electrode pads is plated with nickel, wherein the thickness of the nickel plating is in the range of from 2.5 &mgr;m to 8 &mgr;m.
Accordingly, the nickel plating layer of the present invention completely covers the metal layer preventing any exposure of previous layers through the nickel plating layer. Therefore, no pinhole or the like in which a plating solution may remain is formed, and the nickel plating layer is completely plated with Au. Thus, in the subsequent steps of forming solder bumps and of soldering, solder-nonwetting does not occur, so that the generation of voids in solder connecting pads of an IC chip and pads of a wiring substrate is significantly reduced.
The present invention employs a thickness of the nickel plating layer of 2.5 &mgr;m or more, since a thickness of less than 2.5 &mgr;m allows partial exposure of the base metal layer through the nickel plating layer; in other words, pinholes are formed in the nickel plating layer and result in solder-nonwetting, which, in turn, results in void formation. When the thickness of the nickel plating layer is in excess of 8 &mgr;m, the adhesion of the base metal layer deteriorates or becomes defective (the metal layer may separate from the substrate or crack) due to internal stress generated in the nickel plating layer during plating and a difference in coefficient of thermal expansion between the nickel plating layer and the base metal layer or the ceramic substrate. Thus, the reliability of connection is highly likely to be impaired. In the present invention, the thickness of the nickel plating layer is 2.5 &mgr;m to 8 &mgr;m, preferably 3 &mgr;m to 7 &mgr;m. Through employment of a thickness within this range, the generation of voids in solder of flip-chip bonded pads is reduced, and a potential separation of the base metal layer associated with an internal stress is avoided almost completely. Accordingly, the reliability of the electr
Hashimoto Hiroyuki
Sato Kazuhisa
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
NGK Spark Plug Co. Ltd.
Paladini Albert W.
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