Wiring structure of semiconductor memory device and...

Details Wiring structure of semiconductor memory device and... Wiring structure of semiconductor memory device and...

1997-12-05

2001-06-05

Thomas, Tom (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Transmission line lead

C257S508000, C257S758000

Reexamination Certificate

active

06242796

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a wiring line structure of a semiconductor, e.g., memory device and a formation method thereof for shielding a conductive film that transmits a signal of a semiconductor memory device.
BACKGROUND OF THE INVENTION
In a wiring structure of a semiconductor memory device, a wiring for transmitting a signal is composed of metal. As integration of semiconductor memory devices increases, a coupling effect between neighboring wiring increases. Therefore, a signal transmitted through the wiring loses an original shape, i.e., it becomes distorted.
As shown in
FIG. 1
, a wiring structure of a semiconductor memory device according to the conventional art includes a substrate
2
having a device (for example, a transistor, a capacitor) (not illustrated) formed on the upper surface thereof, an insulating film
3
composed of a material such as an oxide film on the upper surface of the substrate
2
, and a first conductive film
4
(which serves as wiring for transmitting a signal) formed on the insulating film
3
by a photolithography. A coupling capacitance is generated by a coupling effect with a second neighboring conductive film
4
.
As shown in
FIG. 2A
, it can be seen that there occurs a delay in a signal waveform Q
2
at a point P
2
in
FIG. 1
in comparison with a signal waveform Q
1
at a point P
1
. As shown in
FIG. 2B
, there occurs a overshooting, that is a distortion of a signal at a point P
4
in comparison with a signal waveform Q
3
at a point P
3
. Accordingly, in a semiconductor memory device, an error is caused by the inputting of a signal waveform Q
4
at a point P
4
. For example, inverters (not illustrated) are respectively connected to either end of each conductive film
4
, and when an input voltage (Vin) is switched from high level to low level, the input voltage (Vin) is inverted from low level into high level at the point P
1
. Here, when the voltage (Vcc) is inputted, voltage ground (Vss) must be maintained at the point P
3
, but there occurs an overshooting due to a coupling capacitance between neighboring conductive films, and at the point P
4
, the effect is gradually increased, resulting in an error of the inverter receiving an input at P
4
.
As shown in
FIG. 3
, the wiring structure of a semiconductor memory device according to another embodiment of the conventional art has a similar structure to that of
FIG. 1
, which includes a substrate
6
having a device (for example, a transistor, a capacitor) (not illustrated) formed on the upper surface thereof, an insulating film
7
composed of a material such as an oxide film on the upper surface, and conductive films
8
,
9
formed on the insulating film
7
by photolithography to serve as wiring. The conductive films
8
,
9
are alternatingly positioned, and ground voltage (Vss) is applied to the conductive film
9
so as to reduce a coupling capacitance between the conductive films
8
,
9
. In the above structure, a distortion of a signal transmitted to the conductive film
8
can be partially reduced. However, the upper surface of the conductive film
8
is not shielded, so a capacitance caused by a coupling between the conductive films cannot be prevented. Therefore, distortion of a transmitted signal remains unimproved.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an improved wiring structure of a semiconductor memory device according to the present invention which is capable of reducing distortion of a transmitted signal by controlling, i.e., minimizing, a capacitance generated by a coupling between wiring.
It is another object of the present invention to provide an improved formation method for a wiring structure of a semiconductor memory device according to the present invention which is capable of reducing distortion of a transmitted signal by shielding a wiring.
To achieve the above object, there is provided an improved wiring structure of a semiconductor memory device according to a first embodiment of the present invention which includes: a plurality of first signal conductive films formed on a substrate; and a second shielding conductive film which shields a peripheral portion of the first conductive film, which is insulated from the first conductive film by an insulating film, and to which ground voltage is applied.
To achieve the above object, there is provided an improved method for forming a wiring structure of a semiconductor memory device according to the present invention which includes the steps of forming on a substrate a first conductive film to which a ground voltage is applied, forming a first insulating film on the first conductive film, forming a plurality of first grooves by selectively etching the first insulating film, forming a second conductive film on the first grooves and the first insulating film, forming a first pattern connected with the first conductive film and a second pattern not connected with the first conductive film, forming a second insulating film on the first insulating film including the first and second patterns, forming second grooves by selectively etching the second insulating film corresponding to the first pattern, and forming a third conductive film on the second insulating film including the second grooves.
These and other objects of the present invention are also achieved by providing a coaxial tube structure for a semiconductor device, the structure comprising: a substrate; a first signal conductor; a first insulator, coaxial to said first signal conductor; and a first shielding conductor structure, formed on said substrate, coaxial to said first insulator and said first signal conductor.
The foregoing and other objectives of the present invention will become more apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.


REFERENCES:
patent: 3698082 (1972-10-01), Hyltin et al.
patent: 5117276 (1992-05-01), Thomas et al.
patent: 5338897 (1994-08-01), Tsay et al.
patent: 5357138 (1994-10-01), Kobayashi
patent: 5614439 (1997-03-01), Murooka et al.
patent: 5665644 (1997-09-01), Sandhu et al.
patent: 5729047 (1998-03-01), Ma
patent: 5910684 (1999-06-01), Sandhu et al.

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