Wiring structure of semiconductor device

Details Wiring structure of semiconductor device Wiring structure of semiconductor device

2005-03-08

2005-03-08

Eckert, George (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S774000, C257S758000, C257S760000, C257S762000, C257S763000, C257S765000, C257S775000, C438S622000, C438S623000, C438S624000, C438S625000, C438S626000

Reexamination Certificate

active

06864583

ABSTRACT:
A wiring layer is covered with a first organic SOG layer, a reinforcement insulating layer consisting of a silicon oxide film or a silicon nitride film formed by means of a plasma CVD method, and a second organic SOG layer, in this order. A via hole is formed in the first organic SOG layer and the reinforcement insulating layer, and a trench is formed in the second organic SOG layer to correspond to the via hole. A conductive via plug and an electrode pad are embedded in the via hole and the trench, respectively. The second SOG layer is covered with a passivation layer in which a through hole is formed to expose the electrode pad. A wire is connected to the exposed electrode pad in the through hole.

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