Wiring method for semiconductor integrated circuit

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364490, 364489, 364488, G06F 1560

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active

049106805

ABSTRACT:
There is disclosed a computer-aided automatic wiring method for a semi-custom logic LSI having input/output circuit blocks arranged in the peripheral portion of a chip substrate and function blocks arranged in a substrate surface region surrounded by the input/output circuit blocks and selected to provide a desired logic function. Channels functioning as wiring regions are defined around the function blocks to include internal channels positioned between the function blocks and peripheral channels arranged in direct contact with the input/output circuit blocks. The internal channels are sequentially subjected to the wiring process according to the limitation of a predetermined processing order. After the wiring process for the internal channels is completed, the peripheral channels are merged to form a square ring-form channel region. Then, the square ring-form channel region is unidimensionally developed to form a belt-like channel region. The wiring process for the belt-like channel region is effected, and a wiring pattern resultantly obtained for the belt-like channel region is reformed to be suited to the square ring-form channel region, thus completing the wiring pattern for the peripheral channels.

REFERENCES:
patent: 4593351 (1986-06-01), Hong et al.
patent: 4593362 (1986-06-01), Bergeron et al.
patent: 4600995 (1986-07-01), Kinoshita
patent: 4613941 (1986-09-01), Smith et al.
patent: 4811237 (1989-03-01), Putatunda et al.
patent: 4815003 (1989-03-01), Putatunda et al.
"A New Two-Dimensional Routing Algorithim" by Chi-Ping Hsu, IEEE 19th Design Automation Conference, 1982, pp. 46-50.
Proceeding of ISCAS 85, pp. 29-30, "A New Routing Region Definition and Ordering Scheme Using L-Shaped Channels"; W. Dai et al.; 1985.

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