Semiconductor device manufacturing: process – Making passive device – Resistor
Reexamination Certificate
2005-03-15
2005-03-15
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making passive device
Resistor
C438S686000, C438S300000, C438S200000, C438S682000, C438S166000, C438S168000, C257S059000, C257S072000, C257S086000
Reexamination Certificate
active
06867108
ABSTRACT:
In a method for fabricating a thin film transistor array substrate, a glass substrate undergoes an oxygen plasma treatment. A silver or silver alloy-based conductive layer is deposited onto the substrate, and patterned to thereby form a gate line assembly proceeding in the horizontal direction. The gate line assembly includes gate lines, gate electrodes, and gate pads. Thereafter, a silicon nitride-based gate insulating layer is deposited onto the substrate, and a semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer. The semiconductor layer and the ohmic contact layer are HF-treated. A silver alloy-based conductive layer is deposited onto the substrate, and patterned to thereby form a data line assembly. The data line assembly includes data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. A protective layer based on silicon nitride or an organic material is deposited onto the substrate, and patterned through dry etching such that the protective layer bears contact holes exposing the drain electrodes, the gate pads and the data pads, respectively. An indium zinc oxide or indium tin oxide-based layer is deposited onto the substrate, and patterned to thereby form pixel electrodes, and subsidiary gate and data pads. The pixel electrodes are electrically connected to the drain electrodes, and the subsidiary gate and data pads to the gate and data pads.
REFERENCES:
patent: 5667853 (1997-09-01), Fukuyoshi et al.
patent: 5985700 (1999-11-01), Moore
patent: 5998229 (1999-12-01), Lyu et al.
patent: 6274412 (2001-08-01), Kydd et al.
patent: 6674495 (2004-01-01), Hong et al.
patent: 6723281 (2004-04-01), Ueno et al.
patent: 20020106586 (2002-08-01), Lyu et al.
patent: 61222978 (1986-10-01), None
patent: 2003342653 (2003-12-01), None
patent: WO 3098641 (2003-11-01), None
Jeong Chang-Oh
Kang Bong-Joo
Lee Jae-Gab
Anya Igwe U.
McGuireWoods LLP
Smith Matthew
LandOfFree
Wiring line assembly and method for manufacturing the same,... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Wiring line assembly and method for manufacturing the same,..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wiring line assembly and method for manufacturing the same,... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3445954