Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2008-09-02
2008-09-02
Parker, Kenneth (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S059000, C257S072000, C257S758000, C257S775000, C257S750000, C438S022000, C438S128000
Reexamination Certificate
active
10968238
ABSTRACT:
To provide a technique for manufacturing a wiring line having a low resistance and a high heat resistance so as to make an active matrix type display device larger and finer. The wiring line is constructed of a laminated structure of a refractory metal, a low resistance metal and a refractory metal, and the wiring line is further protected with an anodized film. As a result, it is possible to form the wiring line having the low resistance and the high heat resistance and to form a contact with an upper line easily.
REFERENCES:
patent: 4433470 (1984-02-01), Kameyama et al.
patent: 5247190 (1993-09-01), Friend et al.
patent: 5305519 (1994-04-01), Yamamoto et al.
patent: 5323042 (1994-06-01), Matsumoto
patent: 5359219 (1994-10-01), Hwang
patent: 5399502 (1995-03-01), Friend et al.
patent: 5412240 (1995-05-01), Inoue et al.
patent: 5430320 (1995-07-01), Lee
patent: 5482871 (1996-01-01), Pollack
patent: 5567966 (1996-10-01), Hwang
patent: 5594569 (1997-01-01), Konuma et al.
patent: 5627345 (1997-05-01), Yamamoto et al.
patent: 5631478 (1997-05-01), Okumura
patent: 5643826 (1997-07-01), Ohtani et al.
patent: 5648277 (1997-07-01), Zhang et al.
patent: 5734187 (1998-03-01), Bohr et al.
patent: 5798559 (1998-08-01), Bothra et al.
patent: 5866484 (1999-02-01), Muto
patent: 5879982 (1999-03-01), Park et al.
patent: 5923962 (1999-07-01), Ohtani et al.
patent: 5937321 (1999-08-01), Beck et al.
patent: 5946799 (1999-09-01), Yamamoto et al.
patent: 6015997 (2000-01-01), Hu et al.
patent: 6016000 (2000-01-01), Moslehi
patent: 6030904 (2000-02-01), Grill et al.
patent: 6075292 (2000-06-01), Noguchi
patent: 6088596 (2000-07-01), Kawakami et al.
patent: 6096630 (2000-08-01), Byun et al.
patent: 6100573 (2000-08-01), Lu et al.
patent: 6118163 (2000-09-01), Gardner et al.
patent: 6133628 (2000-10-01), Dawson
patent: 6166396 (2000-12-01), Yamazaki
patent: 6175156 (2001-01-01), Mametani et al.
patent: 6198133 (2001-03-01), Yamazaki et al.
patent: 6246118 (2001-06-01), Buynoski
patent: 6281552 (2001-08-01), Kawasaki et al.
patent: 6495857 (2002-12-01), Yamazaki
patent: 6545359 (2003-04-01), Ohtani et al.
patent: 6787444 (2004-09-01), Gardner
patent: 2001/0001496 (2001-05-01), Yamazaki
patent: 2005/0007329 (2005-01-01), Hiroki et al.
patent: 02-012859 (1990-01-01), None
patent: 02-237039 (1990-09-01), None
patent: 03-194938 (1991-08-01), None
patent: 4-369271 (1992-12-01), None
patent: 5-102483 (1993-04-01), None
patent: 07-130652 (1995-05-01), None
patent: 7-130652 (1995-05-01), None
patent: 07-135318 (1995-05-01), None
patent: 07-226515 (1995-08-01), None
patent: 07-263589 (1995-10-01), None
patent: 07-335900 (1995-12-01), None
patent: 8-078329 (1996-03-01), None
patent: 08-078329 (1996-03-01), None
patent: 09-045927 (1997-02-01), None
patent: 09-172070 (1997-06-01), None
patent: 10-91640 (1998-04-01), None
patent: 10-092576 (1998-04-01), None
patent: 10-135468 (1998-05-01), None
patent: 10-135469 (1998-05-01), None
patent: 10-178095 (1998-06-01), None
patent: 10-247735 (1998-09-01), None
patent: WO 90/13148 (1990-11-01), None
Hatano, M. et al, “A Novel Self-Aligned Gate-Overlapped LDD Poly-Si TFT with High Reliability and Performance,” IEDM 97, pp. 523-526, (1997).
Schenk, H. et al, “Polymers for Light Emitting Diodes,” EURODISPLAY '99, Proceedings of the 19thInternational Display Research Conference, Berlin, Germany Sep. 6-9, pp. 33-37, (1999).
U.S. Appl. No. 09/464,189 (pending) to Ohtani et al filed Dec. 16, 1999, including specification, claims, abstract, drawings and PTO filing receipt.
Ohtani Hisashi
Yamazaki Shunpei
Cook Alex Ltd.
Nguyen Joseph
Parker Kenneth
Semiconductor Energy Laboratory Co,. Ltd.
LandOfFree
Wiring line and manufacture process thereof, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Wiring line and manufacture process thereof, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wiring line and manufacture process thereof, and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3921468