Wiring layer in semiconductor device

Details Wiring layer in semiconductor device Wiring layer in semiconductor device

1997-08-15

1999-04-13

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257774, 257776, 257758, H01L 2348, H01L 2352, H01L 2940

Patent

active

058941703

ABSTRACT:
A semiconductor device includes (a) a semiconductor substrate, (b) a first interlayer insulating film formed on the semiconductor substrate, (c) a wiring layer having a thickness T and a width W1 greater than the thickness T formed on the first interlayer insulating film, the wiring layer being divided into a plurality of wiring layer segments each of which has a width W2 equal to or smaller than the thickness T, and (d) a second interlayer insulating film covering the wiring layer segments therewith. The semiconductor device ensures that even when a second interlayer insulating film is formed on a wiring layer by means of bias sputtering or bias CVD, projections are not formed on the second interlayer insulating film above the wiring layer. Namely, it is possible to completely planarize the second interlayer insulating film.

REFERENCES:
patent: 5075753 (1991-12-01), Kozono
patent: 5748550 (1998-05-01), Jeon et al.

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