Wiring configuration for semiconductor component

Details Wiring configuration for semiconductor component Wiring configuration for semiconductor component

2007-02-15

2008-08-19

Menz, Douglas M (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Wire contact, lead, or bond

C257S786000

Reexamination Certificate

active

07414321

ABSTRACT:
In a wiring configuration for a semiconductor component, an unused terminal is insulated from a third land via an insulating film, and thus no connecting member (solder) is required for the unused terminal. With this, the third land is not accidentally removed from a circuit board during exchange of the semiconductor component, and the number of defective circuit boards can be reduced. Moreover, the third land for the unused terminal is included in a wiring pattern due to the connection thereof to other lands or other traces for signals and for grounding with a connecting trace. Thus, the widths of lines can be increased, and furthermore, the insusceptibility of transmission lines in high-frequency circuits to noise can be increased.

REFERENCES:
patent: 6418032 (2002-07-01), Hirata et al.
patent: 2001-177040 (2001-06-01), None

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