Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2000-10-11
2003-03-04
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C174S261000, C174S262000, C174S263000
Reexamination Certificate
active
06528874
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wiring circuit substrate used for mounting electronic devices, such as integrated circuits (ICs) and large scale integrated circuits (LSI circuits). Particularly, the invention relates to a wiring circuit substrate that allows high-density mounting to be implemented.
Furthermore, the present invention relates to a manufacturing method for the aforementioned wiring circuit substrate.
2. Description of the Related Art
FIGS. 54A
to
54
F and
55
A to
55
C are used to describe a conventional example of a high-density-mounting wiring circuit substrate. These figures are cross-sectional views illustrating a manufacturing method for the conventional wiring circuit substrate in the order of steps (A) to (I) described below.
Step (A)
First of all, as shown in
FIG. 54A
, a base
1
is prepared. The base
1
is made of an insulating sheet having a thickness of 25 to 100 &mgr;m. In the base
1
, interlayer-connecting openings
2
are formed by using a punching machine or a drill or by performing laser processing.
Step (B)
Subsequently, as shown in
FIG. 54B
, conductive paste
3
(made of a main material, for example, such as silver or copper) is filled into the openings
2
by using a printing method for example. Thereby, the insulating base
1
is arranged to be a semi-cured sheet A in which the conductive paste
3
is filled into the openings
2
.
Step (C) and Step (D)
Subsequently, as shown in
FIG. 54C
, metal foils
4
made of, for example, copper, are individually arranged over two faces of the sheet A. Then, as shown in
FIG. 54D
, the metal foils
4
are overlaid by using a pressing/heating press. Thereby, a multilayer body is formed such that the metal foils
4
are formed on the two faces, an insulating sheet is provided therebetween, and the metal foils
4
on the two faces are electrically connected to each other via the conductive paste
3
in the openings
2
.
Step (E)
Subsequently, resist films
5
are formed on the metal foils
4
. The resist films
5
have the same pattern as that of conductor circuits that will be formed.
FIG. 54E
shows a state after the resist films
5
are formed.
Step (F)
Subsequently, using the aforementioned resist films
5
as masks, etching is performed for the aforementioned metal foils
4
, thereby forming conductor circuits
6
, as shown in FIG.
54
F. According to the above, layers are separated and arranged on the two faces via the insulating sheet (base)
1
, and a multilayer body B having the conductor circuits
6
interlayer-connected to each other via the conductive paste
3
in the opening
2
is formed.
Step (G)
Subsequently, as shown in
FIG. 55A
, on individual two faces of the aforementioned multilayer body B, insulating sheets la having openings
2
filled with conductive paste
3
and metal foils
4
a
are overlapped with each other. Thereafter, these component members are stacked with each other by using a press, and a multilayer body C is thereby formed.
Step (H)
Subsequently, as shown in
FIG. 55B
, resist films
5
are selectively formed on the metal foils
4
a
on two faces of the multilayer body C.
Step (I)
Subsequently using the resist films
5
as masks, etching is selectively performed for the metal foils
4
a
, thereby performing patterning therefor to form wiring films
6
a
, as shown in FIG.
55
C. Thereby, a wiring circuit substrate
7
having four layers of the conductor circuits
6
and
6
a
are formed.
FIGS. 56A
to
56
G are used to explain another conventional example of a high-density-mounting wiring circuit substrate. These figures are cross-sectional views illustrating a manufacturing method for the conventional wiring circuit substrate in the order of steps (A) to (G) described below.
Step (A)
For example, as shown in
FIG. 56A
, a metal foil
10
(having a thickness of, for example, 18 &mgr;m) made of a copper material is prepared. Then, on the metal foil
10
, conductive protrusions
11
are formed by a printing method via conductive paste (made of a main material such as a silver or copper material) and a metal plate, and then, are heated and cured. The protrusions
11
are thus formed so as to have thicknesses, for example, ranging from 100 to 300 &mgr;m.
Step (B)
Subsequently, as shown in
FIG. 56B
, an insulating adhesive sheet
12
is adhered onto the face on which the protrusions
11
of the aforementioned metal foil
10
are formed. For the adhesive sheet
12
, an adhesive sheet having a thickness smaller than the thicknesses of the protrusions
11
is used. Thereby, the top of each of the protrusions
11
protrudes from the surface of the adhesive sheet
12
. A multilayer body A is produced that has a configuration in which the protrusions
11
are formed on the metal foil
10
and the adhesive sheet
12
is adhered onto the surface of the metal foil
10
in a state of allowing the top of each the protrusions
11
to protrude therefrom.
Step (C) and Step (D)
Subsequently, as shown
FIG. 56C
, a metal foil
13
similar to the aforementioned metal foil
10
is arranged over the surface of the adhesive sheet
12
, then, as shown in
FIG. 56D
, the metal foil
13
is overlaid on the adhesive sheet
12
and the protrusions
11
according to a heating-pressing method. Thereby, a multilayer body B is produced.
Step (E)
Subsequently, for example, resist films for which patterning is performed are formed on the metal foils
10
and
13
individually formed on two faces of the multilayer body B. Then, etching is performed for the metal foils
10
and
13
by using the resist films as masks, thereby forming conductor circuits
14
and
15
.
FIG. 56E
shows a configuration where the resist films used as masks are removed after the conductor circuits
14
and
15
are formed.
Step (F)
Subsequently, two multilayer bodies a are prepared. Each of the multilayer body (a) is formed by the same method as that for the multilayer body (A) shown in FIG.
48
B. As shown in
FIG. 56F
, the two multilayer bodies (a) are individually arranged over two faces of the aforementioned multilayer body (B).
Step (G)
The aforementioned multilayer body (B) is sandwiched by the multilayer bodies (a), and the integrated body is pressed from the sides of two faces thereof according to the aforementioned heating-pressing method. Thereby, a wiring circuit substrate
16
as shown in
FIG. 56G
is produced.
Subsequently, a still another conventional technique will be explained.
FIGS. 57A
to
57
E and
58
A to
58
D show a production process of still another wiring circuit substrate.
Step (A)
As shown in
FIG. 57A
, a copper-plated laminated plate
400
a
is prepared for forming a hole
400
b
for-connection therein by drilling or laser processing. The numeral
400
c
is an insulating sheet to serve as the base member for the laminated plate
400
a
, and
400
d
,
400
d
are copper foils formed on both sides of the insulating sheet
400
c.
Step (B)
Subsequently, as shown in
FIG. 57B
, a copper plating layer
400
e
is formed on the entire surface by an electroless plating process and a subsequent electrolytic plating process.
Step (C)
Subsequently, as shown in
FIG. 57C
, the hole
400
b
is filled with an insulating resin
400
f
, such as an epoxy.
Step (D)
Subsequently, as shown in
FIG. 57D
, both sides of the laminated plate
400
a
is smoothed by mechanical polishing. Thereafter, another copper plating layer
400
g
is formed by an electroless plating process and a subsequent electrolytic plating process. Accordingly, the insulating resin
400
f
filling up the hole
400
b
is covered by the copper plating layer
400
g.
Step (E)
Subsequently, as shown in
FIG. 57E
, a wiring film
400
h
is formed by patterning the copper plating layers
400
g
,
400
d
,
400
e
on both sides of the laminated plate
400
a
. The etching operation is executed by applying a resist film, exposing and developing the same so as to form a mask pattern, and selective etching with the mask pattern used as the mask. After the etching, the resist film is eliminated
Iijima Tomoo
Ohsawa Masayuki
Armstrong Westerman & Hattori, LLP
Nelms David
North Corporation
Tran Long
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