Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-03-28
2002-12-17
Cuneo, Kamand (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S250000, C174S260000
Reexamination Certificate
active
06495769
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a wiring board and production method thereof, and semiconductor apparatus made up thereof.
Increasing speed and density in LSI technology in recent years have come to require a finer size of electronic circuit wires, a multi-layered structure and further improvement of electric characteristics. To meet these requirements, studies have been made to manufacture multi-layered wiring boards made up of organic insulating materials featuring excellent flatness, heat resistance, dimensional stability and dielectric characteristics.
When copper-made wiring is formed on the organic insulating resin substrate, the biggest problem is how to get a close adhesion between the copper wiring and resin substrate. Conventionally, it was the common practice to improve adhesion with the metallic film deposited on the resin substrate surface through anchoring effect or mechanical entanglement by roughening the resin substrate surface by soft-etching it or by placing rubber component into resin substrate in advance and dissolving it with solvent. This method, however, requires tens of microns of an uneven spot to ensure sufficient adhesion. It has been difficult to create fine wiring having a line width not exceeding tens of microns. It has been required to develop a method of accelerating adhesion which ensures a high adhesion merely by creating an uneven spot sufficiently smaller than wiring/space interval on the surface, wherein adhesion does not degenerate even at a high temperature.
Subtract and additive methods are known as methods for forming copper wiring on the organic insulating resin substrate. The subtract method produces wiring circuits by metalizing copper over the entire substrate, thereafter removing by etching the copper of the portion which is unnecessary as wiring. To metalize copper over the entire substrate, CVD and spatter methods are generally used. According to another proposed method, a thin layer of copper is plated onto the entire substrate by thin electroless copper plating, and electric copper plating is used to deposit a thick layer of copper thereafter. For example, the Patent Official Gazette of Japanese Patent Laid-Open NO.187778/1992 discloses a method of depositing copper onto the entire polyimide to a thickness of about 0.3 &mgr;m by electroless plating, following by application to a thickness of about 35 &mgr;m by electroplating. The subtract method requires the copper plate having a thickness not less than 10 &mgr;m to be etched onto the resin substrate, with the result that the side of the copper wiring line must be etched, and the side close to the substrate of the wiring line becomes thin. This makes it difficult to produce a fine line/space pattern. It has been possible to create a line/space pattern of about 40 &mgr;m at most.
The additive method, on the other hand, is a method of producing a circuit pattern on the substrate by resist and depositing conductive metals along said pattern. This method is suited for production of fine wiring because the aspect ratio of copper wiring line is equivalent to the resolution of the resist. This additive method can be further divided into semi-additive and full-additive methods.
According to the semi-additive method, a thin layer of metal is deposited on the entire substrate, then plated resist is created. After that, a thick layer of conductive metal or copper in many cases is plated by electro plating or electroless plating. Subsequent to separation of the resist, the ground metallic film is etched out, thereby producing wiring. It is the common practice to apply a very thin layer of copper by electroless plating onto the copper-plated laminate with copper etched out, and to apply a thick layer of copper by electroplating or electroless plating subsequent to resist formation. After separation of resist, the thin copper film is etched out. This method is suited for the substrate with its surface having tens of microns of an uneven spot, such as the copper-plated laminate with copper etched out, but cannot be used for a more smooth substrate since effective adhesion cannot be ensured. To get higher adhesion, a method is proposed wherein metal other than copper is plated on the substrate; then a thick layer of copper is plated thereto. For example, the Official Gazette of Japanese Patent Laid-Open NO.65061/1998 discloses a method wherein a ground metallic layer is formed on the insulating film by vapor deposition or sputtering dry plating method, and electroless plating followed by electroplating is provided thereon. This method is alleged to permit wiring boards to be produced in a semi-additive method. The ground metallic layer is formed on the insulating substrate, and resist is formed thereon. Then a thick layer of copper is plated by electroplating, and the ground metallic layer is etched out after separation of resist, with the result that fine wiring having dimensions as close to those of the resist is formed. When ground metal and copper coexist, however, it is very difficult to etch only the ground metal. Furthermore, when ground metal is etched out, the copper wiring and ground metal portion thereunder have different width. A slight clearance may be produced between the insulating substrate and ground metal layer. This will raise a problem that, when the wiring board is laminated with insulating adhesive resin, this clearance is not sufficiently filled with adhesive resin, and remains as void.
According to the full additive method, the substrate is provided with plating catalyst; then plated resist is provided. Conductive metal, for example, copper electroless plated, and the resist is separated or is left as permanent resist, as required, thereby producing the wiring board. Since there is no process of etching out the thin ground metallic film, the number of processes is reduced. Since the form of wiring is determined by the form of resist, this method is advantageous to the formation of fine wiring, so the full-additive method is more preferred. Furthermore, even when ground metal other than copper is used, there is no etching process. Since the form of the conductor is determined by the form of resist, there is no problem of a clearance being produced between the insulating substrate and ground metallic layer, as observed in the semi-additive method. However, one of the big problems with the full additive method is that it is difficult to provide electroless plating to the resin substrate with excellent adhesion. A method is proposed to roughen the resin substrate in order to realize tight adhesion. In creating a fine line pattern not exceeding 40 &mgr;m, it has been difficult to use the substrate having an uneven spot not less than microns. For this reason, it has been required to develop a method for providing electroless copper plating on the resin substrate having an uneven spot which is sufficiently smaller than width of the line/space pattern, said plating ensuring a high adhesion free from separation even during electroless plating. The Official Gazette of Japanese Patent Laid-Open NO. 72070/1992 discloses that a high adhesion can be obtained by etching the polyimide resin substrate and providing catalyst, followed by electroless plating and heat treatment at 120° C. or more. However, this Official Gazette failed to provide a thick layer of one micron or more by electroless plating.
The object of the present invention is to provide a wiring board having a fine wiring layer featuring high adhesion, production method thereof, and semiconductor apparatus.
SUMMARY OF THE INVENTION
The present invention relates to a wiring board characterized in that a wiring layer comprising a plated film having a line width of 10 to 40 &mgr;m, preferably 15 to 35 &mgr;m, and a thickness of 15 to 45 &mgr;m, preferably 15 to 35 &mgr;m is formed on an insulating resin substrate through the degenerated layer formed on the surface of said insulating resin substrate, and the average roughness at the centerline of said substrate of at least the portion where said
Akahoshi Haruo
Itabashi Takeyuki
Saito Toshiro
Cuneo Kamand
Hitachi , Ltd.
Norris Jeremy
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