Wireless receiving device having low power consumption and...

Details Wireless receiving device having low power consumption and... Wireless receiving device having low power consumption and...

2011-03-22

2011-03-22

Fan, Chieh M (Department: 2611)

Pulse or digital communications

Synchronizers

C375S355000, C375S376000, C375S359000, C375S371000, C375S373000, C370S503000, C370S516000, C327S141000, C327S156000, C327S158000, C327S159000, C327S160000

Reexamination Certificate

active

07912163

ABSTRACT:
The A/D converter changes sampling timing of a received signal in a synchronization acquisition mode and a synchronization tracking mode. The A/D converter generates an internal clock of a sampling frequency eight times a symbol rate under the control of the clock control unit in the synchronization acquisition mode. On the other hand, in the synchronization tracking mode, the A/D converter generates an internal clock with a symbol point and one each point before and after the symbol point as sampling timing under the control of the clock control unit. The A/D converter further corrects the sampling timing of the symbol point based on the squares of the maximum value of a correlation value between the received signal and a reference signal and the absolute values of correlation values before and after the maximum value.

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Japanese Office Action dated Jul. 29, 2008 (mailing date), issued in corresponding Japanese Patent Application No. 2005-204691.

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