Wirebond electronic package with enhanced chip pad design,...

Details Wirebond electronic package with enhanced chip pad design,... Wirebond electronic package with enhanced chip pad design,...

2007-08-07

2007-08-07

Ha, Nathan W. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Reexamination Certificate

active

11152048

ABSTRACT:
A wirebond electronic package which includes a semiconductor chip bonded to the upper surface of an organic laminate substrate, including to a thermal material located on the substrate and comprised of a plurality of thermally conductive concentric lines. These lines form paths of heat escape for the chip during operation thereof and may operate in combination with other elements to extend the heat paths. Concentric lines also assure sufficient bonding area on the substrate so as to prevent delamination of the chip from the substrate as may occur during high temperatures associated with subsequent processing such as solder ball re-flow. A method of making the package is also provided, as is an information handling system (e.g., computer) adapted for utilizing such packages.

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