Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-10-07
2001-06-12
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S012000, C438S014000, C216S021000
Reexamination Certificate
active
06245586
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates generally to the field of failure analysis, packaging, and assembly techniques employed in the manufacture and testing of semiconductors. More particularly, and not by way of any limitation, the present invention is directed to a wire-to-wire bonding system and method that provides semiconductor samples for such analytical techniques as backside emission microscopy. In addition, the present invention is also directed to providing stackable semiconductor devices for multi-chip assembly.
2. Description of Related Art
Light (or photon) emission microscopy is a common failure analysis (FA) technique used for analyzing semiconductor integrated circuit (IC) devices. The considerations involved in using photon emission to successfully analyze defects and failure mechanisms in CMOS ICs are well known. IC failure analysis using an emission microscope is performed by collecting visible (390-770 nm), and near infrared (NIR) (770-1000 nm, with the typical IR band defined as 770-1500 nm), wavelength photons emitted from transistors, p
junctions, and other photon-generating structures on or near the top (front), electrically-active, silicon surface. These photons are transmitted through the overlying, relatively transparent dielectric layers, passing between or scattered around the patterned, opaque metal interconnections. Detection of photons that emerge from around these overlying layers is referred to as frontside light emission analysis. Correspondingly, imaging light passing through the silicon substrate and emerging from the bottom (back) is referred to as backside light emission analysis.
There is an increasing interest in backside light emission analysis. This is driven, at least in part, by the advancement of IC fabrication technologies with additional opaque conductor layers and packaging technologies that typically obscure the active side (i.e., the front side) of the die. Backside analysis takes advantage of silicon's transmission of photons with energies less than its indirect silicon bandgap energy, corresponding to wavelengths greater than around 1.107 &mgr;m (for undoped silicon). It is commonly known that silicon becomes less transparent as dopants are added. Because of this phenomenon, the heavily doped substrates often used with newer technologies will attenuate NIR light emitted from the active circuits. These and other factors are stimulating research for solutions, including improved substrate thinning techniques, increased NIR imaging sensitivity, and sophisticated spectral analysis.
It is well known that different types of photon emission processes can be distinguished by their spectra. Photon emission from defects or abnormal operation of silicon microelectronic devices generally falls into the following categories: forward or reverse biased p
junctions, transistors in saturation, latchup, and gate oxide breakdown. While radiative recombination emission from silicon structures is generally centered around 1.1 &mgr;m, commonly used cameras have spectral response centered in the 400-900 nm range and can thus capture only a small portion of the emitted light.
Traditional backside emission microscopy typically requires polishing of the die from the backside and socketing the resultant unit (i.e., die sample) in special fixturing for inspection with NIR energies through the polished silicon substrate. Sample preparation for backside analysis requires the sample to remain in the original package or wafer and be imaged through the bottom of the socket that makes electrical contact to the integrated circuit.
Currently, the methods for imaging with a charge-coupled device (CCD) camera involve time integration to acquire enough light to form an image of the circuitry under examination. Real-time IR imaging from the polished backside of a silicon-based IC is difficult due to low frame rates coupled with inadequate illumination intensity. Traditional methods of NIR imaging use an optical filter in conjunction with a broad-spectrum illuminator such as a quartz halogen bulb. The desired wavelengths pass through the filter and are used in the microscope illuminating path. The desired wavelength is selected by the filter when the unwanted light frequencies are rejected. One of the problems of the current technologies is that when a more intense illumination source is used to address at least in part the issue of the poor quantum efficiency of backside emission, the optical filters get degraded or destroyed quickly due to heating. The problem is further compounded by the fact that as the filter bandwidth is narrowed, the total energy is also reduced from the source output. On the other hand, employing longer integration times, by taking the emitted light inputs over a considerable period of time, negatively impacts the throughput. Due to these constraints, it can be appreciated that the current illumination technology cannot provide intense, narrow bandwidth illumination that is advantageous in backside emission analysis.
Laser sources can provide very intense, substantially monochromatic illumination. When these sources are used in backside emission analysis, however, interference phenomena cause what is commonly known as laser “speckle” that blur the illuminated image. The speckle is seen at least in part due to the nonuniform distribution of radiation energy, giving rise to “hot spots” and “dark areas”. While techniques such as diffusing the laser light using a frosted glass, dithering (i.e., scanning the laser beam), et cetera, are sometimes used, they have not been sufficiently effective in alleviating the speckle problem in backside emission imaging. Further, it may be appreciated that the intensity of the light with which the sample is imaged is compromised in such methods. In addition, the recent popularity of Flip Chip technologies, escalation in the number of metal interconnect layers and advanced packaging techniques (for example, Ball Grid Arrays (BGAs), Land Grid Arrays (LGAs), etc.)—all of which obscure the front side view of the active area—justify analysis from the backside.
The following pending U.S. applications, currently owned by the inventor of the present patent application, disclose subject matter related to providing solutions to the aforesaid problems of the current illumination systems with respect to, for example, such FA techniques as backside emission microscopy: (i) “Emission Microscopy System,” Ser. No. 09/181,117 (filed Oct. 28, 1998), in the name of James Barry Colvin; (ii) “Coherent Illumination System and Method,” Ser. No. 09/181,261 (filed Oct. 28, 1998), in the name of James Barry Colvin.
Regardless of the imaging schemes and advances therein, the current technology of sample preparation for backside emission analysis is beset with various drawbacks and deficiencies. As alluded to in the foregoing, current sample preparation techniques for backside analysis require the sample to remain in the original package or wafer and be imaged through the bottom of the socket that makes electrical contact to the integrated circuit. However, certain advanced types of-packages, e.g., BGA packages, Chip-Scale Packages (CSPs), etc. cannot be effectively prepared for backside imaging using the traditional methods. In addition, the height of the socket and corresponding circuit board inhibit imaging at high magnification or with high numeric aperture (NA) due to the recessed “pocket” or “well” created pursuant to the socket dimensions. Also, it is well known that using high NA or employing macro lenses with such socket configurations results in beam vignetting as well, which, in turn, gives rise to undesirable effects in imaging. It should further be appreciated that because of the high profile of the socket well, short working distance objectives such as immersion lenses cannot be used across the die surface.
Furthermore, not only is the current backside sample preparation equipment costly, but also the existing equipment does not produce a flat backside surfac
Picardat Kevin M.
Smith ,Danamraj & Youst, P.C.
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