Wire mesh patterns for semiconductor devices

Details Wire mesh patterns for semiconductor devices Wire mesh patterns for semiconductor devices

2007-05-15

2007-05-15

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

C257S202000, C257S208000, C257SE23151

Reexamination Certificate

active

11171673

ABSTRACT:
Different patterns of interconnects for connecting wells in a semiconductor device are described. For example, a semiconductor device may include n-wells and p-wells arrayed in rows and columns that lie on a rectilinear grid. Electrically conductive interconnects link at least some of the wells. The interconnects are arranged as a mesh having openings that are substantially rectangular in shape.

REFERENCES:
patent: 6936898 (2005-08-01), Pelham et al.

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