Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1998-02-02
2004-07-06
Paladini, Albert W. (Department: 2125)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S261000, C257S784000, C361S777000
Reexamination Certificate
active
06759597
ABSTRACT:
TECHNICAL FIELD
The invention relates to wire bonding to bond pads on semiconductor chip packages and in particular to bond pads which have been coated with palladium.
BACKGROUND OF THE INVENTION
The art of making an electrical connection to a semiconductor chip by wire bonding from a bonding pad on the chip to a corresponding pad or lead on a chip carrier is widely known and practiced in the semiconductor industry. While it has been found to be advantageous in some applications to manufacture chip carriers using conventional organic dielectric material such as epoxy-glass layers and conductive layers of copper, wire bonds made to a copper pad typically fail due to formations of a brittle intermetallic alloy which forms between the wire material, usually gold and the copper pad. Accordingly, one typical practice in the art is to plate a bond pad with a thin layer of nickel followed by a thicker layer of gold prior to bonding a gold wire thereto.
A nickel layer of about 150±50 micro-inch thickness provides a satisfactory diffusion barrier to prevent the formation of copper-gold intermetallic alloys between the copper pad and the gold layer. The-gold layer then provides a satisfactory surface for making conventional wire bond connections. A fairly thick layer of gold, typically greater than fourteen micro-inches is needed for satisfactory bonds with gold wire of 0.8 to 1.5 mili-inch diameter.
Palladium has been used as a lower cost substitute for the gold layer; however, it has been found that the palladium must be heated to relatively high temperatures, e.g., above 200° C., in order to make satisfactory bonds. Because epoxy-glass materials do not tolerate such high temperatures, various attempts have been made to make wire bonds to palladium coated pads, with a nickel diffusion barrier beneath the palladium, without success.
Gillum et al., in “Wire Bond Evaluation Report” by National Center for Manufacturing Sciences, Apr. 30. 1996, reports on p.13 that palladium surfaces give poor results, with many initial incomplete bonds being formed.
SMT Trends, Jan. 22, 1996 reported satisfactory bonds in a preliminary study “Electroless Palladium: A Surface Finish for Interconnect Technology”; however, the bonding temperature used was not reported.
It has been suggested in Japanese patent JP-8139148A that the bondability of a palladium layer over copper can be determined prior to bonding, by measuring how much copper has diffused up through the palladium layer. When a nickel barrier layer is placed under the palladium, bonds made at temperatures below 200° C. fail.
Consequently, palladium has not been used to coat wire bond pads on organic dielectric chip carriers even though palladium has been found to be a satisfactory substitute for gold in coating pads which are used for mounting components by soldering. Where both wire bond chips and soldered components are to be mounted on a single carrier, the use of palladium for both types of bonding pads would be advantageous over using separate metallurgies or the more costly use of gold for both pads, as is the current practice.
OBJECTS AND SUMMARY OF THE INVENTION
It is, therefore, an object of the invention to enhance the semiconductor chip packaging art by providing an enhanced method for bonding wiring to a metal surface on a package, chip, or any other conductive element in the art.
A further object of the invention is to provide an electrical card structure having enhanced bondable pads for receiving conductive wiring.
These and other objects are attained in one embodiment of the invention wherein there is provided a method of forming a bondable metal surface by providing a layer of a first metal, applying a thin layer of a second metal to the first metal layer, and heating the first and second metal layers to a predetermined temperature for a predetermined time. The method may also include the step of bonding a wire to the layer of first metal with the thin layer of second metal thereon.
In accordance with another embodiment of the invention, there is provided an electrical card structure comprising a circuitized substrate having at least one wire bond pad located thereon, a layer of a first metal located on the wire bond pad, and a thin layer of a second metal on the layer of first metal. The electrical card structure may also include a wire bonded to the layer of first metal with a thin layer of second metal located on the first metal, the bond occurring through the thin second layer.
REFERENCES:
patent: 5100835 (1992-03-01), Zheng
patent: 5249728 (1993-10-01), Lam
patent: 5618754 (1997-04-01), Kasahara
patent: 59-84453 (1984-05-01), None
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patent: 63-318134 (1988-12-01), None
patent: 3-265148 (1991-11-01), None
patent: 97106363 (1995-04-01), None
patent: 8-139148 (1996-05-01), None
W.O. Gillum, et al, “Wire Bond Evaluation Report,” National Center for Manufacturing Sciences, Apr. 30, 1996.
“Electroless Palladium: A Surface Finish for Interconnect Technology,” SMT Trends, Jan. 22, 1996.
B. Levine, “Ball Grid Array Research Scrutinized at Binghamton, N.Y. Forums,” Electronic News, Oct. 24, 1994, p. 52.
D. Hillman, et al, “Wirebondability and Solderability of Various Metallic Finishes for Use in Printed Circuit Assembly,” Proceedings of Surface Mount International, Advanced Electronics Manufacturing Technologies Technical Program, Edina, MN, Sep. 10-12, 1996, vol. 2, p. 687-701.
Cullen, D., et al, “Wirebonding to Electrolessly Deposited Metallic Circuit Board Finishes,” Proceedings of IPC Printed Circuits, San Jose, CA, Mar. 1997, p. S16-2-1 to S16-2-10.
Cutting Lawrence Richard
Gaudiello John Gerard
Matienzo Luis Jesus
Murdeshwar Nikhil Mohan
International Business Machines - Corporation
Paladini Albert W.
Pivnichny John R.
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