Wire bondable package design with maxium electrical performance

Details Wire bondable package design with maxium electrical performance Wire bondable package design with maxium electrical performance

1996-05-31

1997-11-25

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257698, 257700, H01L 2352, H01L 2348

Patent

active

056915683

ABSTRACT:
A semiconductor device package for one or more semiconductor dice having core circuits and input-output circuits uses a package substrate having one pair of biplanar conductive planes and another pair of biplanar conductive planes. The pairs of planes are positioned in a coplanar relationship between the package substrate top surface and bottom surface. The top surface has lands connected to the conductive planes and to the power bond pads for the core circuits and input-output circuits on the semiconductor die. The top surface has many top traces connected to the signal bond pads on the semiconductor die. The package substrate may have a die paddle connected to one land and/or thermal vias to conduct heat away from the semiconductor die. Power may be supplied to die core circuits through one pair of planes and to die input-output circuits through another pair of planes to decouple the core circuits from the input-output circuits and minimize noise induced false switching in either set of circuits. The core circuits and the input-output circuits may be powered by the same power supply or separate power supplies.

REFERENCES:
patent: 4551746 (1985-11-01), Gilbert et al.
patent: 4551747 (1985-11-01), Gilbert et al.
patent: 5089881 (1992-02-01), Panicker
patent: 5218230 (1993-06-01), Tamamura et al.
patent: 5513076 (1996-04-01), Werther

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