Windowed flash write circuit

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

36523001, 365900, G11C 800

Patent

active

053134338

ABSTRACT:
The invention is the circuit and method for selecting a window of desired address locations to be written. A start address and a stop address activate a start and stop decoder output respectively. The active start and stop decoder output signals are rippled through start and stop ripple circuitry which enables the outputs electrically interposed between the start and stop addresses respectively. AND circuitry ensures that only the outputs interposed between the start and stop addresses are activated in addition to the start and stop decoder outputs. The activated outputs comprise the window of desired address locations to be written.

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patent: 5119331 (1992-06-01), Sussman
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Barrett et al., "Four-Bit Look-Ahead Mask Generator", IBM TDB, vol. 26, No. 1, Jun. 1983.
Micron Technology, Inc., Product Brochure, "Multiport Dynamic RAM", 1990.
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Jeff Mailloux, et al., "Designing Solutions With Multiport DRAMs", Electronic Engineering International, Oct. 1991, pp. 61-66.
Micron Technology, Inc., Brochure, "Triple Port DRAM-256K x 4 DRAM With Dual 512 x 4 SAMs", 1991.
Jeff Mailloux, et al., "Speed Memory, Ease Timing Requirements With VRAM Functions", Nov. 23, 1989, Electronic Design, pp. 95-99.
Micron Technology, Inc., "DRAM Data Book", 1992.

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