Amplifiers – With semiconductor amplifying device – Including plural stages cascaded
Reexamination Certificate
2008-05-27
2008-05-27
Choe, Henry K (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural stages cascaded
C330S117000
Reexamination Certificate
active
11377824
ABSTRACT:
A circuit and method of reducing noise in the circuit comprises a first transistor and an amplifier operatively connected to the first transistor, wherein the amplifier comprises a plurality of transistors and is adapted to amplify an input signal, and wherein the input signal is differentially captured at an output of the first transistor and the amplifier. Preferably, the plurality of transistors comprises a second transistor and a third transistor. Furthermore, a noise level of the first transistor and the third transistor are preferably cancelled. The size of the second transistor may be approximately 1/50Ω. Preferably, a gain on an amplifier stage formed by the second transistor and the third transistor is adapted to be increased. Moreover, an equivalent transconductance of the amplifier is preferably independent of an impedance matching on the amplifier. Preferably, a noise figure level of the circuit is less than approximately 1 dB.
REFERENCES:
patent: 4956615 (1990-09-01), Bohme et al.
patent: 5465072 (1995-11-01), Atarodi
patent: 6366171 (2002-04-01), Litmanen et al.
Chehrazi, S. et al., “A 6.5 GHz Wideband CMOS Low Noise Amplifier for Multi-Band Use,” Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 4 pages, San Jose, CA, Sep. 21, 2005.
Allstot, D. et al., “Design Considerations for CMOS Low-Noise Amplifiers,” 2004 IEEE Radio Frequency Integrated Circuits Symposium, pp. 97-100, Fort Worth, TX, Jun. 6-8, 2004.
Ismail Aly
Youssoufian Edward
Choe Henry K
Gibb & Rahman, LLC
Newport Media, Inc.
Rahman, Esq. Mohammad S.
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