Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of the amplifier
Reexamination Certificate
1999-03-17
2003-08-12
Neal, Regina Y. (Department: 2651)
Dynamic magnetic information storage or retrieval
General recording or reproducing
Specifics of the amplifier
C360S066000
Reexamination Certificate
active
06606212
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of data storage devices. More particularly, the present invention relates to a magnetic recording channel front-end having an increased channel bandwidth without a degraded signal-to-noise ratio (SNR) performance.
2. Description of the Related Art
The readback bandwidth of conventional magnetic recording channel front-end depends on the impedance of the components forming the channel front-end, i.e., a magnetoresistive (MR) or giant magnetoresistive (GMR) element, an interconnect and readback electronics (i.e., readback amplifier). Until recently, the front-end readback bandwidth requirements were sufficiently low that the bandwidth provided by conventional front-end techniques presented no problems. Nevertheless, magnetic recording data rates have increased so that the readback bandwidth provided by a conventional channel front-end now limits channel transfer.
One approach for increasing the channel bandwidth is by decreasing the limitations on the so-called extrinsic bandwidth, that is, the bandwidth limitation that is caused extrinsic to the read electronics (not including the bandwidth limitations of the readback amplifier), is to terminate the read interconnect by an impedance that is substantially equal to the characteristic impedance of the interconnect. This, however, destroys the signal-to-noise ratio performance of a channel front-end.
To achieve a better defined interconnect, a microstrip connection between the head and readback amplifier has been proposed to replace a twisted-pair wire connection, which provides an ill-defined interconnection. Such a microstrip connection includes two co-planar flat signal conductors formed on a thin sheet of a non-conductive dielectric carrier material having a ground-plane backing, and becomes a transmission line at high frequencies. The characteristic impedance Z
0
of a twisted pair, as is in wide-spread use in magnetic recording, is 75-85 Ohms. The characteristic impedance Z
0
of a microstrip interconnect depends on the width of the conductors, the spacing between the conductors, and the thickness and dielectric constant of the carrier material. Practically speaking, the characteristic impedance Z
0
of a microstrip interconnect in the range of 35-85 Ohms.
There are four configurations for biasing an MR (GMR) element and for reading out, or reading back, a signal: (1) a current bias with current-sensing readback, (2) a voltage bias with current-sensing readback, (3) a voltage bias with voltage-sensing readback, and (4) a current bias with voltage-sensing readback. Because the frequency characteristics of a channel front-end are not sensitive to the particular biasing technique used, only the frequency characteristics of the readback technique used need be considered.
FIG. 1
shows a schematic diagram of a conventional single-ended input, current-sensing readback amplifier configuration
100
. In
FIG. 1
, an MR element R
mr
that is located in a head
101
is connected to a current-sensing readback amplifier
102
through an interconnect
103
. Interconnect
103
has a characteristic impedance Z
0
=R
0
.
Current-sensing readback amplifier
102
includes an npn input transistor
104
and a load resistor R
L
. Conductor
103
a
of interconnect
103
is connected to the emitter of transistor
104
. Conductor
103
b
of interconnect
103
is connected to circuit common, or ground. The base of transistor
104
is connected to a bias voltage V
bias
, and the collector of transistor
104
is connected to a power supply voltage V
+
through load resistor R
L
. The output v
o
of readback amplifier
102
appears across load resistor R
L
.
The input impedance Z
in
for a current-sensing type of readback amplifier, shown in
FIG. 1
, is the differential emitter resistance of input transistor
104
and is given by Z
in
=r
e
=kTqI, where k is Boltzmann's constant, T is the absolute temperature, q is the charge of an electron, and I is the emitter current of transistor
104
. Current I provides the bias current for MR element R
mr
, which is typically 5-12 mA. Thus, the input impedance Z
in
is typically 2-5&OHgr; at room temperature.
FIG. 2
shows a schematic diagram of a conventional single-ended input, voltage-sensing readback amplifier configuration
200
. In
FIG. 2
, an MR element R
mr
that is located in a head
201
is connected to a voltage-sensing readback amplifier
202
through an interconnect
203
. Interconnect
203
has a characteristic impedance Z
0
=R
0
.
Voltage-sensing readback amplifier
202
includes an npn input transistor
204
, an input coupling capacitor
205
, current sources
206
and
207
, an npn cascode transistor
208
, and a load resistor R
L
. Conductor
203
a
of interconnect
203
is connected to the base of transistor
204
through coupling capacitor
205
. Conductor
203
b
of interconnect
203
is connected to circuit common, or ground. Current source
206
supplies bias current I
bias
to MR element R
mr
. Current source
207
supplies current to the base of transistor
204
. The emitter of transistor
204
is connected to circuit common, or ground. The collector of transistor
204
is connected to the emitter of cascode transistor
208
. Cascode transistor
208
is used for eliminating the Miller capacitance at the input of readback amplifier
202
. The collector of transistor
208
is connected to a power supply voltage V
+
through load resistor R
L
. The output v
o
of readback amplifier
202
appears across load resistor R
L
.
The input impedance Z
in
for a voltage-sensing type of readback amplifier is given by Z
in
=&bgr;r
e
, where &bgr; is the current gain of transistor
204
, and r
e
is the emitter resistance of transistor
204
. Input impedance Z
in
is typically 500-1000&OHgr;. Input capacitance
205
is approximately 3 pF and is given by 1/2&pgr;f
t
r
e
, where f
t
is the transition frequency of transistor
204
, which is typically around 10 GHz.
The differential-input versions of the readback amplifiers of
FIGS. 1 and 2
are not shown, but have input impedances that are respectively twice the values described above for the single-ended input readback amplifiers. An MR (GMR) element connected to a readback amplifier through an interconnect that has a characteristic impedance Z
0
“sees” an impedance Z
i
that is given by
Z
i
=
Z
0
Z
in
+
j
Z
0
tan
γ
1
Z
0
+
j
Z
in
tan
γ
1
,
(
1
)
where &ggr;=&ohgr;/&ngr;, &ngr; is the transmission line velocity (≅200 km/s for &egr;
r
=2.25) and 1 is the length of the interconnect, which is typically 5 cm for a 3.5 inch drive.
For a current-sensing readback amplifier configuration, the input impedance Z
in
=kT/qI
1
<<Z
0
. For &ggr;1<<&pgr;/2, Z
i
approaches
Z
in
+
j
Z
0
tan
γ
1
≃
r
e
+
j
ω
Z
0
1
ν
.
(
2
)
Thus, when a current-sensing readback amplifier configuration is used, the interconnect behaves like an inductor Z
0
1/&ngr; that is in series with readout element R
mr
. The transfer characteristic due to the interconnect is then
v
o
v
i
=
R
L
R
mr
+
r
e
1
1
+
j
ω
Z
0
R
mr
+
r
e
1
ν
.
(
3
)
Equation (3) shows that the channel bandwidth of a current-sensing readback amplifier configuration is restricted by the interconnect, and is further reduced as Z
0
or 1 increases, or as &ngr; decreases.
For a voltage-sensing readback amplifier configuration, Z
in
=&bgr;r
e
>>Z
0
. For &ggr;1<<&pgr;/2, Z
i
approaches
Z
0
Z
in
Z
0
+
Z
in
j
tan
γ
1
.
(
4
)
Thus, when a voltage-sensing readback amplifier configuration is used, the interconnect behaves like a capacitor
1
/&ngr;Z
0
that is in parallel with readout eleme
Klaassen Klaassen Berend
Van Peppen Jacobus Cornelis Leonardus
Banner & Witcoff , Ltd.
International Business Machines - Corporation
Neal Regina Y.
Tran, Esq. Khanh Q.
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