Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Pulse multiplication or division
Patent
1987-01-20
1988-03-08
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Pulse multiplication or division
377116, 328 61, 307269, H03L 700, H03K 2100
Patent
active
047303492
ABSTRACT:
A bipolar clock-controlled bistable multivibrator circuit arrangement having a static memory cell formed of a D-master-slave flip-flop with a first inverted output signal fed back to a data input and with feedback loops, respectively, for intermediately storing output signals of the master and the slave. A dynamic memory cell is formed of the D-master-slave flip-flop with a second inverted output signal fed back to the data input. The second inverted output signal has gate propagation times performing intermediate memory functions in place of the feedback loops and includes a synchronizing device connected between the static and the dynamic memory cells. Means are provided for setting the circuit of the static memory cell in operation at relatively high clock frequencies. Thereby the useful frequency range of the multivibrator is at least doubled.
REFERENCES:
patent: 4349753 (1982-09-01), Scavuzzo
patent: 4378505 (1983-03-01), Scavuzzo
patent: 4446382 (1984-05-01), Moore et al.
patent: 4560888 (1985-12-01), Oida
"Electronic Engineering", vol. 51, No. 625, Oct. 1979.
Incecik Zafer
Wilhelm Wilhelm
Greenberg Laurence A.
Heyman John S.
Lerner Herbert L.
Siemens Aktiengesellschaft
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