Wideband error amplifier

Telecommunications – Transmitter – Power control – power supply – or bias voltage supply

Reexamination Certificate

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Details

C330S251000

Reexamination Certificate

active

06792252

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention generally applies to signal amplification, and particularly applies to reducing distortion using an error amplifier.
Ideal linear signal amplification involves the creation of an output signal that faithfully reproduces the characteristics of an input signal but with greater signal amplitude or power. While high fidelity amplification techniques exist, achieving linear low-distortion signal amplification is challenging, particularly with regard to certain types of signals, and in certain types of environments. For example, radio frequency transceivers, such as those used in modern cellular telephones and those used in the supporting radio base stations must generate digitally modulated waveforms with high linearity to achieve high data rates and avoid adjacent channel interference.
Reducing distortion in an amplified output signal poses a number of technical challenges. For example, in the context of radio frequency amplification, the signals of interest are relatively wideband. In amplifier systems based on the Wideband Code Division Multiple Access (W-CDMA) standards, for example, the signal to be amplified having meaningful content may have a frequency of 5 MHz or more. Where multiple-carrier signals are generated, the frequencies of interest may easily extend into the 15 MHz range. Additionally, the use of pre-distortion in such systems easily doubles the bandwidth requirements.
Sources of distortion in the output signal include linear and non-linear distortions. Examples of such distortions include, but are not limited to, signal gain non-linearity, transport/group delay differences in the amplifier circuit at different frequencies, cross-over distortion in the amplifier output circuits, etc.
Any circuit for reducing distortion in an amplifier output signal must generate relatively high fidelity error correction signals across the full bandwidth of interest, and itself must not add to the distortion of the output signal. What is needed then is a distortion reduction circuit that generates accurate distortion compensation signals across a preferably wide frequency spectrum, and that is practically suitable for inclusion in radio frequency transmitter circuits.
BRIEF SUMMARY OF THE INVENTION
The present invention provides methods and apparatus for reducing the distortion in an amplified signal generated by a primary amplifier, by coupling an error-driven feedback signal into the amplified signal via an output transformer. Combining the feedback signal with the amplified signal generates a compensated amplified signal having reduced levels of distortion. A reference amplifier circuit generates a reference signal corresponding to the input signal provided to the primary amplifier for amplification, and this reference signal drives a sense element differentially relative to the compensated amplified signal. Driven in this manner, the sense element generates an error signal, preferably having high common mode rejection and high frequency fidelity. In turn, an error amplifier generates the feedback signal by amplifying the error signal from the error sense element.
In an exemplary embodiment, the error sense element comprises an error sense transformer that comprises a first winding coupling the output of the reference amplifier to the output of a first winding of the output transformer. The other end of the output transformer's first winding is coupled to the output of the primary amplifier. Thus, a differential error signal appears across the first winding of the error sense transformer based on differences between the reference signal and the compensated amplified signal. A second winding of the error sense transformer couples the error signal into an input of the error amplifier, which generates the feedback signal responsive to this input error signal. The feedback signal is applied to a second winding of the output transformer such that it is combined with the amplified signal from the primary amplifier, thus forming the compensated amplified signal. Use of the error sense transformer provides high common mode rejection, which helps insure that the error signal substantially reflects only the differences between the reference signal and the compensated amplified signal.
Alternatively, the error sense element might be implemented as a resistor coupling the reference signal to the compensated amplified signal. With this configuration, a differential error voltage is developed across the resistor based on differences between the reference and compensated amplified signals. A differential connection between the error amplifier and the resistor allows the error amplifier to generate the feedback signal based on the differential error voltage. While the resistor-based approach to error sensing might result in lower common mode rejection and lower frequency fidelity as compared to using the error sense transformer discussed above, it does yield potential cost savings where potentially lower compensation performance is tolerable.
Regardless of the particular implementation of the error sense element, use of transformer coupling between the feedback and amplified signals imparts several advantages to exemplary embodiments of the error amplifier circuit. Such advantages include, but are not limited to reduced loading of the error amplifier, and convenient scaling of the feedback signal relative to the amplified signal. Relieving the error amplifier from driving the output load as seen by the compensated amplified signal provides, among other things, component selection flexibility. That is, because the output transformer multiplies the load impedance by the square of a desired turns ratio, the error amplifier is not required to have the same drive capability as the primary amplifier. Further, maintaining signal fidelity in the error signal is easier with a more lightly loaded error amplifier.
An exemplary embodiment of the present invention finds particular use in envelope elimination and restoration (EER) circuits as exemplified in the co-pending application Ser. No. 09/911,105, entitled “Apparatus and Method for Efficiently Amplifying Wideband Envelope Signals,” filed on Jul. 23, 2001, and which is a continuation of the now-issued and identically titled U.S. Pat. No. 6,300,826 B1, both of which are incorporated in their entireties herein by reference. However, those skilled in the art will recognize that various embodiments of the present invention have applicability well beyond this exemplary application.


REFERENCES:
patent: 6252784 (2001-06-01), Dobrenko
patent: 6300826 (2001-10-01), Mathe et al.
patent: 6476674 (2002-11-01), Smedegaard-Pedersen et al.

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