Wide frequency range phase-locked loop circuit with phase...

Details Wide frequency range phase-locked loop circuit with phase... Wide frequency range phase-locked loop circuit with phase...

2006-01-17

2006-01-17

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C331S011000

Reexamination Certificate

active

06987406

ABSTRACT:
A PLL circuit is arranged to provide a wide capture range, and to lock the leading edge of the feedback signal with the center of the reference clock pulse. The PLL circuit includes a charge pump circuit, a loop filter circuit, a VCO circuit, a PFD circuit, a phase detector circuit, a frequency comparator circuit, and a multiplexer circuit. The frequency comparator circuit is configured to compare the frequency of the reference clock with the frequency of the feedback signal, and to provide a status signal based on the comparison. The comparison is a determination of whether the frequencies of the reference clock and the feedback signal are within a tolerance window. Further, the multiplexer circuit selects either the PFD output or the phase detector output based on the comparison. The PFD is employed to bring the frequencies of the feedback signal and the reference clock signal within the tolerance window.

REFERENCES:
patent: 4940952 (1990-07-01), Kegasa
patent: 5950115 (1999-09-01), Momtaz et al.
patent: 6307413 (2001-10-01), Dalmia et al.
patent: 6566967 (2003-05-01), Anumula et al.
patent: 6642747 (2003-11-01), Chiu
patent: 6683930 (2004-01-01), Dalmia

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