Wide dynamic range delta sigma A/D converter

Details Wide dynamic range delta sigma A/D converter Wide dynamic range delta sigma A/D converter

1996-09-16

1999-04-20

Hoff, Marc S.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

341120, H03M 302

Patent

active

058961011

ABSTRACT:
In a delta sigma modulator, generally comprising one or more integrators fed into a multilevel quantizer, the output of which is the output of the delta sigma modulator and is also fed through a digital to analog converter in a feedback loop to the integrators, the quantizer is made sparse, i.e. the levels output by the quantizer are not evenly spaced, but rather are closely spaced for small deviations from 0 V, and broadly spaced for large deviations from 0V. The A/D converter in the feedback is matched to the quantizer. For example, the levels might be -1 V, -1/8 V, 0V, 1/8 V, and 1 V. The digital output signal from the sparse quantizer is fed into a correction RAM, which corrects for nonlinearities in the D/A converter before the digital signal is filtered by a low pass filter and frequency down converted. The contents of the RAM are selected whenever the A/D conversion system is powered on. The contents of the RAM are selected by closing a series of sets switches in the A/D converter and adjusting the output of the RAM to 0.

REFERENCES:
patent: 4943807 (1990-07-01), Early et al.
patent: 5187482 (1993-02-01), Tiemann et al.
patent: 5289529 (1994-02-01), Karnowski
patent: 5392042 (1995-02-01), Pellon
patent: 5461381 (1995-10-01), Seaberg
patent: 5550544 (1996-08-01), Sakiyama et al.
patent: 5583501 (1996-12-01), Henrion
patent: 5594612 (1997-01-01), Henrion
"Multibit Oversampled .SIGMA.-.increment. A/D Converter With Nonuniform Quantization, " by ??, Electronics Letters, 14 Mar. 1991, p. 528.
Digitally Corrected Multi-Bit .SIGMA..increment. Data Converters, by Cataltepe et al., IEEE Proc. ISCAS'89, pp. 647-650, May 1989.

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