Wide band selectable gain and operating frequency CMOS oscillato

Oscillators – Solid state active element oscillator – Transistors

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Details

331161, 331179, H03B 536

Patent

active

051422514

ABSTRACT:
A CMOS oscillator integrated circuit in a Pierce crystal oscillator circuit configuration operates at oscillating frequencies over a wide band frequency range. A single inverter stage (I1) is coupled between the oscillator input (OSC IN) and the oscillator output (OSC OUT). An oscillator feedback circuit coupled between the oscillator output and oscillator input incorporates an oscillator crystal (XTAL). A pullup gain network (PNET) provides a plurality of different parallel pullup gain paths between the pullup transistor (P1) of the inverter stage (I1) and the high potential power rail (V.sub.CC). The pullup gain paths have different pullup gain resistances (RP2, RP3, . . . RPN) in the respective pullup gain paths for implementing different amplifying gains (A.sub.N) by the inverter stage (I1). Digitally addressable pullup gain switches (P2, P3, . . . PN) are coupled in respective pullup gain paths for selecting different gain paths and different amplifying gains (A.sub.N). A similar pulldown gain network (NNET) is coupled between the pulldown transistor (N1) of the inverter stage (I1) and the low potential power rail (GND). The CMOS oscillator circuit therefore accommodates different oscillator crystals having different operative gain limits (A.sub.MIN, A.sub.MAX ) and different characteristic operating frequencies for operating the CMOS oscillator circuit over a wide band of digitally selectable operating frequencies.

REFERENCES:
patent: 4387350 (1983-06-01), Bessolo et al.
patent: 4442415 (1984-04-01), Ashiola

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