Well for CMOS imager

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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C257S291000

Reexamination Certificate

active

11025960

ABSTRACT:
A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. The well region is laterally displaced from a charge collection region of a second conductivity type of a pinned photodiode.

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patent: 6768149 (2004-07-01), Mann et al.
patent: 6777662 (2004-08-01), Drowley et al.
patent: 6794281 (2004-09-01), Madhukar et al.
patent: 2004/0232456 (2004-11-01), Hong

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