Weightless binary N-tuple thresholding hierarchies

Details Weightless binary N-tuple thresholding hierarchies Weightless binary N-tuple thresholding hierarchies

1999-08-04

2001-08-07

Malzahn, David H. (Department: 2121)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S210000

Reexamination Certificate

active

06272511

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to weightless binary n-tuple thresholding hierarchies, and in particular, but not exclusively to weightless binary Hamming value comparators and related methods, for use, for example in weightless binary neural networks.
2. Discussion of Prior Art
There are very many applications where a large number of weightless binary inputs need to be summed and compared to a threshold value. For example in the template matcher or neural pattern correlators described in our co-pending International Patent Application Nos. PCT/GB98/03834 (U.S. Ser. No. 09/368,585); PCT/GB98/03835 (U.S. Ser. No. 09/370,892); PCT/GB98/03832 (U.S. Ser. No. 09/368,584); or PCT/GB98/03833 (U.S. Ser. No. 09/371,270), require or; provide architectures for carrying out summing and thresholding of binary weightless strings. The entire contents of the above Applications are incorporated herein by reference.
Conventional systems are synchronous using clocked counters or registered accumulators or clock-based machine/processor technology, but these suffer from high noise, low speed and are not particularly fault tolerant.
SUMMARY OF THE INVENTION
It is therefore an aim of this invention to provide improved forms of weightless binary Hamming value comparators, and in particular tuple thresholding hierarchies for weightless binary neural networks. The inventors have found that it is practical to use probabilistic rather than deterministic methods for performing a sum and threshold function for large numbers of inputs and have developed novel hierarchies for distributed template matching and weightless binary neural network pattern detection.
Accordingly in one aspect this invention provides a weightless binary comparator for comparing the Hamming value of N weightless inputs with a threshold T and for indicating if said Hamming value passes said threshold, which comprises:
means for applying respective sub-groups of said weightless inputs to sum and threshold means,
means for applying a threshold value to each of said sum and threshold means, and
means for passing the outputs of said sum and threshold means to a sum and threshold means for providing an output indicative of whether the Hamming value of the weightless inputs passes said threshold.
Preferably, said threshold is a weightless threshold.
In another aspect this invention provides a method of comparing the Hamming value of N weightless inputs with a threshold T, which comprises applying a sum and threshold operation to respective subgroups of said inputs to obtain respective outputs, and applying a sum and threshold operation to said respective outputs to obtain an output indicative of whether the Hamming value of said weightless inputs passes said threshold.
Preferably, said threshold is a weightless threshold.
In another aspect, this invention provides apparatus for processing weightless binary input data, which comprises:
a plurality of processing modules each for operating on a plurality of bits of said input data and providing an output,
means for distributing respective bits from said weightless binary input data between respective processing modules, and
means for passing output data from said processing modules to a processing module to provide a processed output.
In a further aspect, this invention provides a method for processing weightless binary input data, which comprises:
providing a plurality of processing modules each for operating on a plurality of bits of input data and providing an output;
distributing respective bits from said weightless binary input data between respective processing modules and
passing output data from said processing modules to a processing module to provide a processed output.
Whilst the invention has been described above it extends to any inventive combination of the features set out above or in the following description.


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