Waveform shaping circuit for a multiplexed information bus trans

Pulse or digital communications – Transceivers

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Details

375285, 327100, 326 90, H04B 138, H04B 1500, H03K 190175, H03K 1700

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058125957

ABSTRACT:
A waveform shaping circuit (120) provides a shaped variable pulse width modulation signal (VPWM) for an SAE (Society of Automotive Engineers) J1850 compliant bus. The J1850 specification defines a single wire multiplexed bus protocol for an automotive application. A counter logic circuit (440) receives a variable pulse width modulation signal (VPWM) signal having unshaped rising and falling edges and a clock having a period smaller than a desired rise or fall time. The counter logic circuit (440) shapes the rising and falling edges of the VPWM signal by sequentially switching each of a variable weighted resistor string (410) to produce an unfiltered shaped VPWM signal. The unfiltered shaped VPWM signal is smoothed by a low pass filter (430) to produce a smoothed shaped VPWM signal.

REFERENCES:
patent: 3906366 (1975-09-01), Minami et al.
patent: 4727570 (1988-02-01), Tarbouriech
patent: 5010332 (1991-04-01), Egami
patent: 5153466 (1992-10-01), Stein et al.
patent: 5194761 (1993-03-01), Smith
patent: 5210772 (1993-05-01), Nakagawa

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