Waveform peak capture circuit for digital engine analyzer

Computer graphics processing and selective visual display system – Display peripheral interface input device – Light pen for fluid matrix display panel

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324379, 36443104, 364487, G09G 500

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052509354

ABSTRACT:
A digital engine analyzer has an oscilloscope display and is controlled by microprocessors operating under menudriven stored program control. The analyzer receives analog input signals from an engine being analyzed. Peak capture circuitry permits the display of a full cylinder period of a waveform, even though it contains very high frequency portions, by selectively switching between normal and high resolution modes. The circuitry samples the analog waveform at a very high rate and selects samples for display at a much slower display rate. The circuitry captures and stores the highest magnitude sample in each cylinder cycle by storing each sample only if its magnitude exceeds that of the previously stored sample. In the normal mode, at each display clock pulse the most recent sample is selected for display, irrespective of its magnitude. In the high resolution mode the stored peak value is selected for display at each display clock pulse.

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Allen Company "Programmed Training Course" Manual for 62-000 Series Smart Engine Analyzer, p. 119.

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