Wave digital filter with low power consumption

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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06963889

ABSTRACT:
A wave digital filter which includes a plurality of memoryless adapters each having two or more ports, each port including an input and an output, and at least one controlled gate which delays the propagation of a value into at least one input of at least one of the adapters.

REFERENCES:
patent: 4982355 (1991-01-01), Nishimura et al.
patent: 5197020 (1993-03-01), Schwartz
patent: 5561617 (1996-10-01), Van der Wal
patent: 6065032 (2000-05-01), Nicol
Fettweis, Alfred; “Wave Digital Filter: Theory and Practice”; Proceedings of the IEEE; vol. 74; No. 2; pp. 270-327; Feb. 1986.
Manshanden et al.; “Design of Wave Digital Filters with Minimal Coefficientlength”; Delft University of Technology; The Netherlands; Sep. 11, 1997.
Uming Ko et al., “A Self-Timed Method to Minimize Spurious Transitions In Low Power CMOS Circuits”, Low Power Electronics, 1994, Digest of Technical Papers, IEEE Symposium, San Diego CA, USA, Oct 10, 1994, pp. 62-63.
Vivek Tiwari, “Guarded evaluation: pushing power management to logic synthesis/design”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 17, No. 10, Oct 10, 1998, pp. 1051-1060.
Supplementary Search Report for EP 01 90 6088.

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