Excavating
Patent
1992-02-03
1995-04-18
Beausoliel, Jr., Robert W.
Excavating
371 163, 371621, G06F 1100
Patent
active
054086434
ABSTRACT:
A microcomputer comprises a central processing unit, a watchdog timer generating a watchdog timer processing request when an overflow occurs in the watchdog timer, and an interrupt controller processing as a non-maskable interrupt the watchdog timer processing request generated by the watch timer. The central processing unit generates a preset signal to the watchdog timer at a beginning of execution of another interrupt processing by the central processing unit, so as to preset the watchdog timer. The interrupt controller responds to the preset signal for cancelling the watchdog timer processing request generated by the watchdog timer in a period of time of retaining the watchdog timer processing request by the interrupt controller.
REFERENCES:
patent: 4726024 (1988-02-01), Guziak et al.
patent: 4796211 (1989-01-01), Yokouchi et al.
patent: 4809280 (1989-02-01), Shonaka
patent: 4956842 (1990-09-01), Said
IBM Technical Disclosure Bulletin vol. 30, No. 11, Apr. 1988.
EDN Magazine vol. 25, No. 19, pp. 113-115, 117, 118 "Software-Based Refresh Scheme Saves Hardware"--Duane Graden.
Beausoliel, Jr. Robert W.
Hua Ly V.
NEC Corporation
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