Watchdog timer

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Patent

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Details

371 16, G06F 922, G06F 1128

Patent

active

045946850

ABSTRACT:
The invention provides apparatus and method to verify appropriate program execution. Hardware external to a processor includes a resettable timer and a shift register for storing and shifting a bit pattern. Internally of the processor a bit pattern is also manipulated by a routine which also outputs a clock signal. A selected bit from each of the patterns is compared on each clock signal. If the clock signal repeats at a sufficiently rapid rate to keep the timer from expiring and, if the comparison is favorable, the processor is allowed to run; otherwise it is reset.

REFERENCES:
patent: 3749897 (1973-07-01), Hirvela
patent: 4072852 (1978-02-01), Hogan
patent: 4472789 (1984-09-01), Sibley
"Improved .mu.C Watchdog Timer Detects Errors", Mackall, Digital Design, Apr. 1978, p. 72.

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