Horology: time measuring systems or devices – Combined with disparate device
Reexamination Certificate
1999-12-21
2001-04-03
Miska, Vit (Department: 2859)
Horology: time measuring systems or devices
Combined with disparate device
C368S107000, C368S306000, C368S277000, C368S277000, C368S277000, C368S001000
Reexamination Certificate
active
06212134
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a watch dog timer system which is usually employed as a fault supervisory function for software/hardware in an industrial computer or a fault-tolerant computer.
2. Description of the Related Art
A watch dog timer function is used to detect a stop of a computer arising from a bug of a program or from any other cause particularly where the computer is of the type which must not stop such as an industrial computer or a controller for controlling a machine or a product.
The watch dog timer function is usually useful and is sometimes incorporated in an LSI of a one-chip CPU in recent years. This is because it is a definition of normal operation of a computer that “a computer clears a watch dog timer in a fixed time=a program is operating normally”. However, if execution of a program enters a permanent loop which includes clearing of a watch dog timer because of a bug, then because this does not satisfy the definition, the bug cannot be detected.
Further, it is sometimes the case that, when an abnormal value is used as a value to be calculated because of some hardware fault, a system operates in a different manner since the value can possibly be assumed by the system. Thus, it is demanded to detect such abnormal operations of a computer as described above with a high degree of accuracy.
A countermeasure which satisfies the demand is disclosed, for example, in Japanese Patent Laid-Open No. Hei 4-241642 wherein it is defined that a system is operating normally when “check points are cleared” using a pass state indication register and “a watch dog timer is cleared” to detect abnormal operation of the system.
According to the system described above,
1. an “execution condition of a program” is not defined precisely,
2. an order in time in which check points are to be passed is not detected, and
3. production of a program is complicated because a plurality of commands including a pass state indication register setting command and a watch dog timer clearing command are used.
Therefore, the system of the document mentioned above is disadvantageous in that it cannot detect a permanent loop which includes the pass state indication register setting command by which check points are set and the watch dog timer clearing command. The system is disadvantageous also in that, upon production of a program, it is not easy for a programmer to use the system in that it is not clear what time difference should be provided to the pass state indication register setting command for check points from the watch dog timer clearing command and that the program must be produced using a conditional branch and so forth so that a program route for execution of the pass state indication register setting command and another program route which includes the watch dog timer clearing command may coincide with each other.
Also, since a check is performed at each check point, the system is disadvantageous in that it does not allow, comparison between a plurality of computers as in designing of a fault-tolerant computer system (because setting of values of check points and confirmation of the same are isolated from each other).
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a watch dog timer system which has an abnormality checking function of a high degree of reliability.
In order to attain the object described above, according to the present invention, abnormality of a system is detected as a variation of a value allocated in accordance with an execution condition of a program.
More particularly, there is provided a watch dog timer system including a counter for resetting an entire computer when a value of the counter overflows, comprising execution condition storage means for receiving execution state data defined in accordance with an execution condition of a program from a processor of the computer and storing the execution state data before the counter overflows, and comparison means for comparing the execution condition data stored in the execution condition storage means and state sequence data indicative of a state sequence of the program and generating a reset signal for resetting the entire computer when the comparison reveals incoincidence.
Where the state sequence of the program is determined in advance, the watch dog timer system may further comprise state sequence storage means for storing the state sequence data indicative of the state sequence of the program in advance, and readout means for successively reading out the state sequence data stored in the state sequence storage means.
With the watch dog timer system, the following advantages can be achieved.
If execution of the program enters a permanent loop or the like and the computer stops for a fixed time, then the entire computer is reset and re-starts its normal operation. Consequently, a non-deactivating computer or a fault-tolerant computer system can be constructed using the watch dog timer system.
Further, since a value is allocated to each execution condition of the program and, when the counter of the watch dog timer is cleared, the value of the watch dog timer is compared to detect whether or not the computer is in a state transition condition determined in advance, not only it can be detected whether or not the computer is in a stopping state, but also it can be detected that the computer is entrapped in an abnormal flow of program operation.
Where a plurality of non-deactivating computers or fault-tolerant computers are involved and the same program is used between them, since operation conditions of them with respect to time are similar to each other, an abnormal operation of any of the computers is detected by comparison only of the value of an operation condition of the program.
Upon debugging of the program, the watch dog timer system can be used also to confirm/detect that a program execution condition estimated in advance is entered.
In order to cope with a flexible state transition condition of the program, the watch dog timer system may further comprise a state machine for producing state sequence data corresponding to a state transition condition of the program from the execution state data stored in the execution condition storage means.
In order to detect a fault between a plurality of computers including the computer, the watch dog timer system may further comprise selection means for selectively inputting time sequence data transmitted thereto from another computer to the comparison means. This allows detection of which one of a plurality of non-deactivating computers is entrapped in an abnormal state.
The above and other objects, features and advantages of the present invention will become apparent from the following description and the appended claims, taken in conjunction with the accompanying drawings in which like parts or elements are denoted by like reference symbols.
REFERENCES:
patent: 4597052 (1986-06-01), Majsuda
patent: 5860002 (1999-01-01), Huang
patent: 6009521 (1999-12-01), Huang
patent: 4-241642 (1992-08-01), None
McGuireWoods LLP
Miska Vit
NEC Corporation
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